注意这个算法首先执行一个乘法，然后又执行一个除法(移位)。
Note that the algorithm performs a multiply first and a divide (shift) later.
重点讨论了其中的整数执行部件的设计，包括ALU、乘法器、桶式移位器、寄存器堆等重要执行部件。
It is given that the detailed design of the integer execution unit, include ALU, multiplier, barrel shifter and register files.
与传统的移位乘法器相比，它将乘法器速度提高一倍。
Compared with the traditional serial multiplier, it can obtain twice speed-up.
数字信号处理器包含了中央算术逻辑单元、乘法器单元、移位器单元、排序器单元、辅助寄存器单元、中断单元的设计。
The digit signal processor embodies the center arithmetic logic unit, Multiplier unit, Shifter unit, Sequencing unit, Auxiliary register unit, interception unit.
把乘法器系数表示为CSD形式，将常系数乘法优化为最少的移位加操作。
Coefficients of the multipliers are transformed into CSD forms and the multiplications are substitute by minimum shift-add operations.
该文提出的无乘法器结构的滤波器实现方法主要基于移位相加操作、子表达式和乘法器模块的思想。
This paper presents a realization scheme based on shifting and adding operation, sub-expression, and multiplier module.
该文提出的无乘法器结构的滤波器实现方法主要基于移位相加操作、子表达式和乘法器模块的思想。
This paper presents a realization scheme based on shifting and adding operation, sub-expression, and multiplier module.
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