说明：在fpga上是现奇数分频。可以更好的理解的FPGA开发的时序问题。
In the FPGA is the odd frequency. The development of FPGA timing problems can be better understood.
设计人员通常在时序分析上花大量的时间和精力，因为一个微小的时序问题能导致整个设计的逻辑功能的错误。
Designers have to spend most of time and energy on timing analysis, because a slight mismatch would lead whole failure of entire logic function.
针对DSP时序解决显示乱码问题。
使用BuildForge的时序安排功能，在交错间隙上运行正式的构建，从而限制拥塞等问题。
Use the scheduling capabilities of build Forge to run official builds at staggered intervals to limit the congestion problem.
将时序数据有效地映射到特征空间是时间序列相似性搜索的一个关键问题。
Mapping the raw time series data to a modality space effectively is a critical problem in time series similarity search.
本文提出迁移函数法。用此方法可以解决多变量时序电路综合问题。
This paper presents a transition function method which can be extended to solve the synthesis problems of multiple variable sequential circuits.
针对深亚微米工艺下版图设计中存在的时序收敛问题，提出了一种区域约束的版图设计方法。
A new method for layout design based on region constraints was presented to resolve the timing closure problem of physical design in deep sub-micron technology.
模型类型选择和模型适用性检验是时序建模的两个基本问题。
Two basic problems in time series modelling are the selection of the type of model and the test of suitability of the model.
考虑一类整数规划问题，其诸局势效益值时序相互关联，且呈现小样本无明显统计特征。
This paper discusses a kind of integer planning problems, whose situation benefit values are some relational time series with little samples, and are not typical statistic properties.
基于无复位时序电路，详细研究了有复位状态的同步电路测试生成问题及在无复位电路中的应用。
In order to test the circuits that has not any reset state, special way for resolving start state is described.
首先，文章讨论了静态时序分析中的伪路径问题以及路径敏化算法，分析了影响逻辑门和互连线延时的因素。
Firstly, false paths in static timing analysis and the algorithm to sensitize paths are presented, and then some factors affecting gates and interconnects delay are discussed.
采用新型的GTL总线收发器、时钟相位调节和组合式匹配等技术措施，解决了总线设计的驱动、时序和信号完整性问题。
The problems of backplane bus design, such as the driver, timing and signal integrate, have solved by using the GTL transceivers, phase adjustment of the clock and combined match techniques.
对数字电路中卡诺图化简、时序电路分析和集成电路教学等三个问题的教学方法进行一定的分析和探讨。
This paper is a discussion on some teaching methods of the simplification for Karnaugh map, the analysis of sequential circuit and the teaching of integrated circuits.
时间序列信息系统中的决策问题的关键是有效地挖掘历史数据中包含的时序信息。
Furthermore, the key problem of decision making in time series information system is how to effectively mine the time order information in history data.
在时序电路的RTL激励生成中，基于模拟的方法避免了帧扩展法庞大的搜索空间，但采用该方法常存在向量过多，质量不高等问题。
In pattern generation for sequential circuits at RTL, simulation-based methods avoid the large search space used in time-frame expansion methods, but the quality of patterns cant be guaranteed often.
介绍了新型通信控制器的硬件设计，着重描述了通信接口部分，用复杂可编程逻辑器件CPLD解决了CAN 控制器芯片SJA 1000与AT 91RM 9200之间的时序逻辑问题。
The hardware structure is introduced, emphatically the communication interface circuit. The time sequence logic problem between CAN controller chip SJA1000 and AT91RM9200 is solved using the CPLD.
时序知觉的认知机制与神经基础还有不少重要问题有待进一步探究。
Many important problems about cognitive and neutral mechanisms of temporal order perception need to be researched further.
对异步时序电路的分析和使用是一个比较困难的问题，所以，异步时序电路的实际应用范围远不如同步时序电路。
It is rather difficult to analyze and make use of asynchronous sequential circuits, so the application of asynchronous sequential circuits is much narrower than synchronous ones.
正如文中所指出的那样，绝大多数组合与时序优化问题，实际上都是NP -完全问题，因而试图给出现实可行的一劳永逸的通用算法在目前是办不到的。
Just as this paper points out, most problems about combination and sequential optimization are in fact NP-complete, so, it's impossible to find a general algorithm to solve all the problem presently.
由于该时序逻辑综合新方法在处理过程中要涉及解大型覆盖表的问题，为此提出满足压缩状态表约束关系的状态分配的简化算法。
This method, based on combinational logic minimization, proposes a new idea to proceed state assignment according to constrained. relation of compressed state table.
如何实现同步时序电路的初始化是时序电路测试中的关键问题。
How to implement the initialization for synchronous sequential circuits is a important issue.
主要介绍了北台球墨铸铁管厂退火炉时序脉冲燃烧控制系统的组成、控制原理和动态性能，指出时序脉冲燃烧控制方式的优点以及在引进应用中应注意的问题。
The composition, control principle and dynamic characteristics of time series pulse combustion control system applied to the annealing furnace in Beitai Ductile Cast Iron Pipe Plant are introduced.
针对时序数据中的复杂模式问题，提出了一种时序模式算法，并描绘了算法的基本思想及给出了算法的简单伪代码。
In the paper, being directed to the complex model of time-series pattern, drawing idea and giving pseudo code of the algorithm of finding time-series patterns has been presented.
针对网络控制系统中数据包传输的时序错乱问题，本文用附加缓冲器方法加以克服。
For the wrong order of data packets in NCS, The additional buffer method is put forward to deal with the problem in this report.
选择部分典型工程进行造价分析，提出内河航运工程在建设时序上及工程设计中值得考虑的问题。
Based on the cost analysis of typical projects, this paper puts forward matters of attention concerning construction sequence and engineering design of inland navigation projects.
对照数据手册的时序要求优化硬件逻辑设计，解决了双核嵌入式处理器TMS320 VC 5471和USB芯片PDIUSBD12时序不兼容的问题。
We have optimized the hardware logic according to the timing requirement on datasheet, and solved the timing incompatibility between the dual-core processor TMS320VC5471 and the USB chip PDIUSBD12.
本文还针对异步时序电路测试生成问题进行了有益的研究。
In this dissertation, some beneficial researches on test pattern generation for asynchronous circuits are taken.
解决了CCD的时序电路及功率驱动电路设计问题。
The paper designs the circuits of working clock and power driver for CCD.
任务调度问题是指根据一定的调度策略，把一组并行处理的任务按规定的时序分配到系统的多个处理机节点上，以期获得较好的系统执行性能。
Task scheduling aims at scheduling a set of partially ordered computational tasks onto a multiprocessor system by a given strategy in order to obtain a better system performance.
任务调度问题是指根据一定的调度策略，把一组并行处理的任务按规定的时序分配到系统的多个处理机节点上，以期获得较好的系统执行性能。
Task scheduling aims at scheduling a set of partially ordered computational tasks onto a multiprocessor system by a given strategy in order to obtain a better system performance.
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