介绍了PLC内部数据寄存器和辅助继电器的分配，给出了部分程序指令。
The distribution of the data registers and auxiliary relays in the PLC is introduced, then some part of instructions are given.
算法的硬件结构由模乘控制器、模幂控制器、数据寄存器和模乘运算单元构成。
The hardware architecture is made up of modular controller, modular exponentiation controller, data register, and modular multiplication operation units.
可程序化量子处理器根据程序寄存器中存储的指令对数据寄存器中的量子态作指定的操作。
According to the order stored in the program register, the processor operates the quantum state in the data register.
介绍了一种对定时器、计数器、数据寄存器的数据进行外部设定并显示的电路，并给出了相应的梯形图程序。
This paper introduces a circuit setting up and displaying the data of timer, counter and data register out of PLC. It gives the ladder-type Patterned program.
一种改进的基于闪速EEPROM存储器的存储子系统，包括一个或多个闪存阵列，每一个都带有两个数据寄存器和一个控制器电路。
An improved flash EEPROM memory-based storage subsystem includes one or more flash memory arrays, each with a duplicity of data registers and a controller circuit.
如果该值是 MAGIC_NUMBER，就从所传递的结构中获取数据/中断寄存器的值，并按照这个结构的值来产生中断。
If it is MAGIC_NUMBER, get the data/interrupt register values from the structure passed and generate the interrupt as per the structure values.
PPE用载入和存储指令访问主存储器(有效地址空间)，可以在主存储器与内容可以缓存的私有寄存器文件之间移动数据。
The PPE accesses main storage (the effective-address space) with load and store instructions that move data between main storage and a private register file, the contents of which may be cached.
在SIGILL的情况中，DAR可能不会提供任何有用的数据，因为这个寄存器在SIGSEGV的情况中就被用来存放故障地址。
In the case of SIGILL, the DAR might not provide useful data, because this register is used to store the fault address in the case of SIGSEGV.
这里有三项数据：一个是基地址，第二个是索引寄存器，第三个是乘数。
Here, there are three entities: one is the base address, the second is the index register, and the third is the multiplier.
在内核中，这些进程称为线程，代表了单独的处理器虚拟化(线程代码、数据、堆栈和CPU寄存器)。
In the kernel, these are called threads and represent an individual virtualization of the processor (thread code, data, stack, and CPU registers).
使用Kprobes可以轻松地收集处理器寄存器和全局数据结构等调试信息。
Debugging information, such as processor registers and global data structures, can be easily collected using Kprobes.
dar(数据地址寄存器)包含处理器尝试访问的地址，这一行为将引发页面错误。
The dar (Data address Register) contains the address that the processor tried to access, which then caused a page fault.
开发者甚至可以使用Kprobes来修改寄存器值和全局数据结构的值。
Developers can even use Kprobes to modify register values and global data structure values.
dsirr（数据存储中断原因寄存器）表示发生的页面错误的类型。
The dsirr (Data Storage Interrupt reason Register) indicates the type of page fault that has occurred.
dsisr(数据存储中断状态寄存器)表示页面错误无法解决的原因。
The dsisr (Data Storage Interrupt Status Register) indicates why the page fault could not be resolved.
如果发生D -cache失效(处理器无法在D - cache中找到数据)，那么发出一个中断，让相应的寄存器可以通过增加它的值记录这一事件。
If a D-cache miss (the processor fails to find data in the D-cache) occurs, an interrupt is raised so that the corresponding register can record this event by increasing its value.
在SPU上，大部分指令都可以在寄存器上进行操作，就仿佛它们分别包含多个无关的值一样(因此可以对多个数据项执行一条指令)。
On the SPUs, most instructions can operate on registers as if they contained multiple, independent values (thus the single instruction acting on multiple data items).
专用寄存器覆盖绑定选项和数据库管理器配置参数。
The special register overrides the bind option and the database manager configuration parameter.
通常，它们以程序所知的可用的一组“基本”数据——栈数据、全局变量、寄存器——作为出发点。
Generally, they start off with a "base" set of data that is known to be available to the program — stack data, global variables, and registers.
底层网络包的数据或消息区域封装了一个请求命令，它请求设备中包含设备信号数据的寄存器的内容。
A request command is enclosed in the data or message section of the underlying network packet. It requests the contents of registers in the device containing signal data of a device.
每个操作都是并行地针对多个数据元素进行，这些数据分别存储在一些128位的寄存器中。
Every operation works on multiple data elements in parallel, stored in 128-bit registers.
这个寄存器定义了将用于数据通信的物理串行接口。
This register defines the physical serial interface which will be used for data communications.
为了得知外设是否就绪，CPU必须不停地轮询接口(读状态寄存器)并最终锁存数据。
In order to know this, the CPU must be continually 'polling' the interface (reading the status register), and finally latched the data.
在调试信号时，需要查看的一些重要寄存器包括GPR、指令指针(NIP)、机器状态寄存器(MSR)、Trap、数据地址寄存器(DAR)等等。
Important registers to look for when debugging through signals are the GPRs, instruction pointer (NIP), machine state register (MSR), trap, data address register (DAR), and so on.
利用该机制可以将对DSP寄存器的访问转变为单纯的对一数据结构的访问。
Through the mechanism we can perform DSP register access just like to access a simple data structure.
mcontext_t提供了有关在系统出问题时可以找到的所有寄存器值的数据；这些寄存器值可以作为信号发送给这个进程。
McOntext_t provides data about all the register values found in the system at the time of the fault; the register values will in turn be delivered to the process as a signal.
为了让图像加速卡能够知道哪些输入寄存器应该载入哪些数据，就需要使用着色器声明。
In order that the accelerator could know what data should be loaded in each input register, shader declaration is required.
最通常的分析是数据依存性分析，它用来确定指令使用的变量(寄存器或内存位置)是否被另一条指令修改。
The most common analysis is data dependence analysis, which is to determine the instructions that use the variable (register or memory location) modified by another instruction.
信息面板的内容将灰化以突出显示寄存器的内容不是即时的，而是取自跟踪数据的。
If you backtrace the run trace log, Information pane gets grayed to emphasize that displayed registers are not actual but taken from the trace data.
因为大多数设备是分开的CPU总线，慢得多的发送数据跨比写信给CPU寄存器或内存(缓存)。
Because most devices are separated from the CPU by a bus, which is much slower to send data across than it is to write to CPU registers or (cached) memory.
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