分支提示至少是分支指令之前的4个指令取出组，否则就没有效果。
At minimum, the branch hint must be four instruction fetch groups before the branch instruction, or it will have no effect.
例如，如果一个条件标上了“likely”，那么编译器可以把代码的True部分直接放在分支指令后面(这样就不需要执行分支指令)。
For example, if the conditional is marked "likely" then the compiler can place the True portion of the code immediately following the branch (which will not be taken).
hbr hint_trigger, $register ——告诉处理器相对地址 hint_trigger 处的分支指令可能会跳转到寄存器 $register 所指定的地址。
hbr hint_trigger, $register -- This tells the processor that the branch instruction at the relative address hint_trigger is likely to branch to the address specified in register $register.
指示事件完成之前已执行的分支指令的个数。
Indicates the number of branch instructions executed until the event is completed.
分支预测算法的研究包括分支历史信息的处理，分支指令地址的映射，状态转换等。
The research on branch prediction includes the use of history information, branch instruction address mapping and state transition.
传统的软件容错技术频繁使用和比较分支指令检测错误，带来了巨大的性能和功耗的开销。
Traditional software fault tolerance USES a great deal of branch instructions to detect errors, thus brings great overhead in both performance and power dissipation.
如您所见，这段代码更加简单——分支更少，指令也更少。
As you can see, the code is much simpler — it has fewer branches and fewer instructions.
这让处理器可以提前准备分支操作（例如预取指令）。
This allows the processor to prepare for the branch ahead of time (prefetching the instructions, for instance).
brsl代表“branch relative and setlink”，用来分支到函数的入口点并将链接寄存器(LR)设置为返回地址的下一个指令。
BRSL stands for "branch relative and set link." This branches to the function entry point and sets the link register (LR) to the next instruction for the return address.
本文基于ARM 9tdmi内核，从指令调整、寄存器分配、条件分支和循环结构等方面对汇编代码的优化方法进行了详细的论述。
This article gives a detail discussion on the assembled code optimization from instruction arrangement, register division, condition selection branch and cycle structure based on the core of ARM9TDMI.
在多分支结构的识别过程中，通过对索引表和跳转表调用指令的格式分析，提出了双特征指令匹配算法。
By analyzing the formats of calling instructions to the indexed table and the jump table, proposed a novel recognition algorithm based on character instruction matching.
指令读取器亦产生搜寻位址输出至分支目标缓冲器中。
The fetcher also generates a search address for output to the branch target buffer.
本文基于对近年来国内外分支预测方法的分析，提出了一种切实适用于MIPS指令系统的混合分支预测方案。
Through analyzing the methods of branch prediction proposed in recent years, I bring forward a hybrid branch prediction scheme which ADAPTS well to MIPS instruction set.
问题的关键是SPU有几个条件指令，例如selb、shufb和位操作，它们可以不用分支就能实现条件操作。
The key is that the SPU has several conditional instructions, such as selb, shufb, and the bit operations, which allow conditional operations to occur without branching.
问题的关键是SPU有几个条件指令，例如selb、shufb和位操作，它们可以不用分支就能实现条件操作。
The key is that the SPU has several conditional instructions, such as selb, shufb, and the bit operations, which allow conditional operations to occur without branching.
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