可见，在低功耗设计中抓住功率的消耗主体尤为关键。
So, we can see that realize the point which is the main power dissipation is the key of the lower power design.
整机的低功耗设计，使便携式仪器的电池供电成为可能。
The low consume design of whole unit makes it possible to supply with cell for the portable meter.
功耗管理是可穿戴计算系统低功耗设计的一个重要手段。
Power management is one of the most important key for lower power design of wearable computing system.
阐述了如何运用门控时钟来进行CMOS电路的低功耗设计。
This paper concentrates on using gated-clock in low-power design of CMOS circuits.
介绍了一种80c51嵌入式微处理器内核的低功耗设计方法。
The low power design of an 80c51 embedded microprocessor core is presented in this paper.
它可以为小型，低功耗设计，多媒体性能可以用在恶劣的环境中。
It can be used in harsh environments for compact, low power designs, multimedia performance.
此后，介绍了低功耗设计方法，本设计主要采用门控时钟结构来降低功耗。
Then the methods of low power design are introduced, and the clock gated is used in this design.
为了解决复杂嵌入式系统的低功耗设计，提出了一种新的动态电源管理策略。
In order to solve the problem of low power design of complicated embedded system, a novel dynamic power management policy is presented.
超长电池使用时间：采用超强无线通讯协议，低功耗设计，可以使用3-4个月；
Ultra long battery period of revolution: Uses the ultra strong wireless communication protocol, the low power loss design, may use for 3-4 months;
在低功耗设计时，除了在硬件上选用低功耗的芯片，还在软件上采用了低功耗设计技术。
In order to reduce power consumption, some low-power techniques are adopted in both hardware and software.
为了实现低电压低功耗设计的要求，改进了调制器结构，并进行了从系统到电路模块的优化。
The low voltage and low power target is attained by improving the modulator structure and optimizing from system to circuit blocks.
对安装在轴承座内的数据采集模块在硬件和软件上进行了低功耗设计，使其能长期安全地运行。
The data acquisition module installed in the bearing block is designed in a low-power way both in the hardware and software.
针对便携式仪器的低功耗特性要求，从硬件电路和软件编程两方面对整个系统进行了低功耗设计。
We design the low consumption to the whole system from hardware circuit and software programming as to the low consumption characteristic of the portable instrument.
Sporian的专长包括分析化学，分子生物学，光学，低功耗设计，无线通讯和电子机械包装。
The effort leverages Sporian's expertise in areas including analytical chemistry, molecular biology, optics, low power design, wireless communications and electro-mechanical packaging.
进入深亚微米工艺后，静态功耗开始和动态功耗相抗衡，已成为低功耗设计一个不可忽视的因素。
In deep sub - micron technology, the mount of the static power catches up with the dynamic power gradually and the standby power is becoming an important factor in low power design.
指出了变送器校验仪硬件及软件的设计方法，分析讨论了其设计所采用了低功耗设计和面板校准技术。
In this article , the designing way of trans calibrator′s hard wane and software is explained in details, especially the usage of low power consumption design and panel calibrating technique.
高性能的系统芯片对数据存取速度有了更严格的要求，同时低功耗设计已成为VLSI的研究热点和挑战。
The access time is important for the system chip with high performance, the low power has been the spotlight and challenge in VLSI design.
作为低功耗设计的理论基础，本文从数字电路的基本功耗方程出发，重点讨论了各设计层次优化功耗的方法；
As the theoretic foundation of low power, power optimization from design levels of digital circuit has been discussed with emphasis based on the basic power consumption equation.
同时总线编码技术对于降低DSP总线功耗有明显的效果，所以这一技术对DSP低功耗设计有重要的意义。
The low power on-chip buses encoding technique is resultful for reducing the power consumption of DSP buses, so it is meaning for DSP low power design.
基于低功耗设计考虑，调制器采用有源-无源混合型环路滤波器，并通过离散时间微分技术移除信号求和模块。
Upon the low power design consideration, a hybrid active-passive loop filter is employed and the signal summing block is removed by using discrete-time differentiation technique.
摘要：嵌入式系统低功耗设计中有硬件技术无法涉足的空间，可通过低功耗软件技术实现降低系统功耗的目的。
Absrtact: There is a research field for low power technology that can't be mentioned only by the hardware design, so then using low-power software technology can reduce system power consumption.
提出了一种系统级电流使能控制结构，可广泛地应用在CMOS数模混合电路中，用于实现系统级的低功耗设计。
A low power design in system level using current steering architecture, which can be applied to the system of CMOS mixed signal circuit widely, is presented.
嵌入式系统低功耗设计的目标是在满足用户对性能需求的前提下，尽可能降低系统的能耗，延长设备的待机时间。
The purpose of low power design is to minimize the energy consumption of an embedded system and extend the lifetime of battery without losing its performance.
动态功耗管理是一种系统级低功耗设计技术，降低功耗的思路是根据系统当前负载动态调整时钟频率或者关闭时钟。
Dynamic power Management (DPM) is a technique to reduce power consumption of systems by shutting down clocks or changing their frequency according to system loads.
文章通过对CMOS集成电路功耗起因的分析，对CMOS集成电路低功耗设计方法和设计工具进行了深入的讨论。
Through the analysis of the source of CMOS IC power consumption, design methods for low-power CMOS IC "s and a set of EDA tools are discussed in detail in this paper."
介绍了SOC设计中的IP核可复用技术、软硬件协同设计技术、SOC验证技术、可测性设计技术以及低功耗设计技术。
The paper introduced the technology of IP Reuse, hardware and software co-design, SOC verification, measurement and low-power design on the SOC design.
同时国家节能减排政策的提出以及低碳环保观念的深入人心，使得超大规模集成电路（VLSI）低功耗设计变得越来越重要。
The proposing energy saving and environmentally friendly national policy and low carbon concept deeply rooting among peoples, the VLSI low power design is becoming increasingly important.
在前面的基础上，论文第四章重点地阐述了汽车轮胎压力检测及监控系统的具体实现方案，包括硬件设计、软件设计以及低功耗设计。
The fourth part of the paper puts emphasis upon particular scheme for Car Tire Pressure Inspecting and Monitoring system. It includes the design of hardware, software and power down mode.
在前面的基础上，论文第四章重点地阐述了汽车轮胎压力检测及监控系统的具体实现方案，包括硬件设计、软件设计以及低功耗设计。
The fourth part of the paper puts emphasis upon particular scheme for Car Tire Pressure Inspecting and Monitoring system. It includes the design of hardware, software and power down mode.
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