It can translate the bit level description of the specification of combinational circuits and sequential circuits into word level polynomials.
它能把组合电路和时序电路的位级描述的设计规范表示成字级多项式。
It can translate the bit level description of the specification of combinational circuits and sequential circuits into word level polynomials.
它能把组合电路和时序电路的位级描述的设计规范表示成字级多项式。
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