As in case of drain-source voltage this method allows to associate the elements of the drain current waveform with its contribution to the whole spectrum.
就象漏源极电压的例子那样，用这种方法也可以找出漏极电流的哪一部分对电磁干扰频谱产生影响。
The 800v quasi resonant design with lower current peak and lower drain-source voltage during turning on of the MOSFET demonstrates advantages in conducted EMI spectra regarding the primary side.
拥有更低峰值电流和场效应晶体管漏源极开通电压的800伏特准谐振设计展示出一次侧传导电磁干扰降低的优势。
If left overnight in this condition, housekeeping current demanded by the ESC could drain the battery below its safe discharge voltage... leaving you with an irreparable battery.
如果在这种情况下放置过夜，按esc要求的看家电流会消耗电池低于其安全放电电压…让你有一个无法弥补的电池。
With a gate voltage around 2.5v (minimum), output power and drain current increases substantially.
随着周围2.5V的栅极电压(最低)，输出功率和漏电流增加了很多。
The drain current model is simplified by an average capacitance formula and a simple expression of channel average mobility with gate voltage.
采用一个随栅压变化的平均电容公式，并用一个简单的解析表达式来描述沟道平均迁移率随栅压的变化关系。
The drain current model is simplified by an average capacitance formula and a simple expression of channel average mobility with gate voltage.
采用一个随栅压变化的平均电容公式，并用一个简单的解析表达式来描述沟道平均迁移率随栅压的变化关系。
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