VLIW is the latest way to simplify processors.
VLIW是简化处理器的最新方法。
Then a VLIW optimizing compiler adopting two-level software pipelining is described.
然后叙述采用两级软件流水的VLIW优化编译器；
The data processing unit using VLIW and SIMD vector structure is the key of the architecture.
数据处理单元是结构的核心，采用VLIW加SIMD向量结构。
Recently, we have seen that VLIW has been regaining popularity as means to improve performance.
最近，我们看到了VLIW已重新流行的手段来提高业绩。
The debate between the merits of superscalar and VLIW is not only restricted to the GPP universe.
之间的辩论的优点超标和VLIW指令不仅限于优良药房工作规范宇宙。
Within a few years, it's certain that at least some of your software will be running on VLIW chips.
今后几年中，至少你的部分软件肯定会运行在vliw芯片上。
The chip USES a reconfigurable architecture and very long instruction words (VLIW) to optimize the complex functions.
芯片使用可重构体系结构和超长指令字(VLIW)，优化了高复杂度函数。
We know that a key difference between superscalar and VLIW lies in the hardware and software complexity respectively.
我们知道，一个关键区别在于超标量和超长指令字中的硬件和软件的复杂性分别。
VLIW chips don't need most of the complex control circuitry that superscalar chips must use to coordinate parallel execution at runtime.
VLIW芯片不需要超级标量芯片为运行时协调并行处理所采用的复杂控制电路。
As a conditional jump may cause significant code performance penalty, the architecture of recent VLIW DSPs offers support for conditional instructions.
为克服条件跳转指令的缺陷，新一代超长指令字(VLIW)体系结构的数字信号处理器(dsp)提供了对条件执行指令的支持。
It is especially important to VLIW architecture as for the performance of the machine has something to do with the design and realization of the compiler.
对于VLIW机器来讲，由于机器性能与编译器的设计和实现有很大的关系，指令调度就显得尤为重要。
Combined the ISS with an assembler and a debugger, a software optimization development environment for block cipher specific VLIW processor is constructed.
结合指令集模拟器、汇编器以及调试器，设计了一个面向VLIW处理器的辅助程序优化环境。
We customized a machine specification and a machine description for the VLIW DSP, and constructed the code generator using the template provided by IMPACT.
我们为VLIWDSP定制它的机器规格说明和机器描述，并利用IMPACT的模板构造它的代码生成器。
In this thesis we discuss such a DSP, which USES a clustered VLIW architecture and can perform multiple operations simultaneously during a single clock cycle.
本文讨论这样一款DSP，它采用分簇的VLIW体系结构，能够在单个时钟周期同时执行多个操作。
VLIW DSP has simple control hardware, and its ILP is decided during the compile time, so compiler is the key factor in developing applications based on VLIW DSP.
VLIWDSP机器由于硬件控制简单，指令的并行性完全在编译时决定。因此编译程序成为基于VLIW DSP机器应用的关键因素。
VLIW machine's parallel property makes that compiler's capability is judged by improving machine's execution efficiency utmost, while nowadays local scheduling is used to its bottleneck.
VL IW机器的并行特性，导致其以最大限度地提高执行效率作为评判编译器性能的依据，而现今局部调度的使用已达到瓶颈。
Newly-emerging high performance processors for intensive computing generally use distributed register files to support ALU array and to explore instruction level parallelism(ILP) by VLIW.
新一代面向密集计算的高性能处理器普遍采用分布式寄存器文件来支撑ALU阵列，并通过VLIW开发指令级并行。
Newly-emerging high performance processors for intensive computing generally use distributed register files to support ALU array and to explore instruction level parallelism(ILP) by VLIW.
新一代面向密集计算的高性能处理器普遍采用分布式寄存器文件来支撑ALU阵列，并通过VLIW开发指令级并行。
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