FPGA as controller initialize video decode chip SAA7111A through I2C bus.
FPGA作为控制器，经I2C总线对视频解码芯片SAA7111 A进行初始化。
In the part of video decode, chip SAA7111A is adopted to decode the video image signal, enhancing the speed of image display.
在视频解码部分采用硬件芯片SAA7111 A对视频图像信号进行解码，提高图像显示的速度。
In the part of video decode, chip SAA7111A is adopted to decode the video image signal, enhancing the speed of image display.
在视频解码部分采用硬件芯片SAA7111 A对视频图像信号进行解码，提高图像显示的速度。
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