A new BIST structure with the method of test vector generation based on a controlled LFSR is proposed.
本文提出了一种基于受控线性反馈移位寄存器（LFSR）进行内建自测试的结构及其测试矢量生成方法。
This paper studies a test vector generation algorithm for digital circuits which can locate the component faults.
结合一个实际电路，研究了一种可把数字电路故障定位到器件级的测试向量生成算法。
Designed the inter-frame decoding IP soft-core, including the motion vector generation module, prediction processing modules and interpolation modules.
详细设计了帧间解码IP软核，包括运动矢量生成模块、预测处理模块和插值模块。
Circuits described are modeled to behavior sets after abstraction, and can be replaced by their behavior sets during functional test vector generation procedures.
通过抽象，电路可以规范为行为集，并代替电路本身进行功能测试向量的生成。
Circuits described are modeled to behavior sets after abstraction, and can be replaced by their behavior sets during functional test vector generation procedures.
通过抽象，电路可以规范为行为集，并代替电路本身进行功能测试向量的生成。
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