Based on the system clock and trigger input signals, using FPGA to generate trigger output signals in given working modes.
通过FPGA实现在一定系统时钟和触发信号作用下各种工作模式的触发信号的产生。
Most switch mainframes can be triggered externally via the trigger input and can send an output trigger pulse when the relay contacts have settled.
大多数开关主机都可通过触发输入进行外部触发，并且在继电器触点稳定之后可输出一个触发脉冲。
Trigger input: the user can interact with the VR world by pressing a button.
触发输入：用户按下一个按钮就可以与虚拟世界互动。
Trigger input: the user can interact with the VR world by pressing a button.
触发输入：用户按下一个按钮就可以与虚拟世界互动。
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