Loading of this processor, averaged over the last minute, in Percent.
加载这台处理器，用百分比表示上衣分钟的平均值。
This processor supports XSLT version 2.0 and XPath version 2.0 and is optimized for performance.
这个处理程序支持XSLTversion 2.0和XPath version 2.0，并进行了性能优化。
With the topology defined, you call linsched_init to initialize the environment for this processor topology.
定义拓扑后，您可以调用linsched _ init以便为此处理器拓扑初始化环境。
The testing data is sent to FPGA board through serial ports. This processor reads the data and sends to PC host.
为了准确测试本处理器的运行情况，本文应用串口传递测试数据入FPGA开发板，测试模块读入测试数据，发送入PC机的主机端。
This processor was the first to be built on a single silicon chip, which was no larger than a child's fingernail.
这种处理器首次建立在单个的、不比小孩子的手指甲大多少的硅芯片上。
This support comes after Microsoft officially made available a copy of 64-bit Windows that supports this processor architecture.
该支持是在Microsoft正式使得支持该处理器架构的 64位Windows副本可用之后实现的。
Using this processor core, most of complex related calculation and control function can be fulfilled by updating the software.
利用它可以通过灵活的配置软件完成基带处理中绝大部分的复数相关运算和控制功能。
Recent implementations of third - and fourth-order time and frequency analysis signatures in this processor are also briefly described.
第三和第四阶的时间和频率分析，签名，该处理器还简要介绍了近期实现。
This processor is a single-core version of the POWER4 processor, which maintains binary compatibility with other members of the Power Architecture family.
这种处理器是Power 4处理器的单核心(single - core)版本，它保持了与Power架构家族其他成员的二进制兼容性。
Many types of speech compression algorithm can be implemented and easily exploited on this processor, and they can achieve high security and low complexity.
该处理器能够实现多种类型的语音压缩算法，可以达到对语音算法的高保密性、低复杂度、易开发性。
Using this processor, some morphological transformations such as dilation, erosion and edge detection have been implemented optically and the experimental results are given.
提出了基于液晶光阀的光学二值图像邻域处理器，利用它完成了扩、蚀和边缘检测等形态变换操作，并给出了实验结果。
This is native code, compiled to the processor architecture in use.
这是原生代码，在使用时由处理器构架编译。
To do this, the CPUs will communicate with each other. This causes each processor to pause application threads that are currently running.
为了完成这个任务，CPU之间将要彼此通讯，从而导致每个处理器暂定当前正在运行的应用程序线程。
This allows the processor to prepare for the branch ahead of time (prefetching the instructions, for instance).
这让处理器可以提前准备分支操作（例如预取指令）。
This exits the DB2 command line processor mode so that you can change directories.
这将退出DB 2命令行处理器模式，以便可以更改目录。
To handle this situation, have the processor look at the element after the named anchor in the HTML document.
要处理这种情况，可以让处理器查看HTML文档中命名锚点之后的元素。
As we will see, the XSL processor finds this information most easily by matching the root element.
如我们将看到的，通过匹配根元素，XSL处理器可以最轻易地找到该信息。
This variation means that the processor busy rate now has a random denominator and a random numerator, which renders this value fairly useless in a production virtual world.
这种变化意味着现在处理器繁忙时间所占百分比的分子和分母都是随机的，因此这个值在生产虚拟环境中没有用处。
The biggest problem with this was that a naive processor is likely to load that DTD URL, which might be an unwanted network operation.
这样做的最大问题是新型的处理器很可能加载此DTDURL，而这可能是一种不必要的网络操作。
Remember, this is a vector processor. So you are not actually comparing register 3 with the number 0. Instead, you are comparing each word of register 3 with the number 0.
请注意这是一个向量处理器，所以并非将寄存器3与数值0作实际对比，相反，所对比的是寄存器3的每一个字与数值0。
With this implementation method, the processor would produce deployment descriptors that would allow for further customization by the developer.
通过使用这种实现方法，处理器将生成可允许开发人员进行进一步自定义的部署描述符。
This helps AIX to maintain its processor affinity.
这有助于AIX维护它的处理器关联性。
In this test case, we accessed processor load and response time for various user loads.
在这个测试案例中，我们评估各种用户负载下的处理器负载和响应时间。
When we run this procedure from DB2 command line processor (CLP), it returns the location NEW YORK for department 10.
当我们在DB2的命令行处理器(CLP)中运行这个过程时，它对部门10会返回位置NEWYORK。
When this is the case, a word processor can save you time and labor as you rearrange the manuscript.
在这种情况下，文字处理器能帮你节省时间和精力来重牌手稿。
All POWER6 processor systems support this mode.
所有POWER 6处理器系统都支持这种模式。
More data is passed to the cache and processor; this is somewhat analogous to the improvement that broadband connections offer over dial-up connections.
更多的数据被传递到高速缓存和处理器中；这就像相对于拨号连接，宽带连接的进步一样。
In this case, processor 0 is attached to logical node 0, processor 1 to node 1, and so on.
本例中，处理器0将附属于逻辑节点0，处理器1附属于节点1，以此类推。
In this case, processor 0 is attached to logical node 0, processor 1 to node 1, and so on.
本例中，处理器0将附属于逻辑节点0，处理器1附属于节点1，以此类推。
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