Implementation of static timing analysis.

静态时序分析的实现。

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Static timing analysis is an exhaustive method of analyzing, debugging and validating design performance.

静态时序分析是一种彻底的分析、调试、验证设计的方法。

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We accomplished the full-chip static timing analysis of X microprocessor, and made a detailed analysis such as critical-path checking in the circuit.

参与并完成了X微处理器全芯片的静态时序分析工作，对电路的关键路径等重要信息进行了详细分析。

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In the project of HDTV channel receiving ASIC, DFT techniques based on scan-chains, STA (Static Timing Analysis) and formal verification has been adopted.

数字高清晰度电视信道接收芯片实现中使用了基于扫描链的可测试设计和静态验证技术。

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Firstly, false paths in static timing analysis and the algorithm to sensitize paths are presented, and then some factors affecting gates and interconnects delay are discussed.

首先，文章讨论了静态时序分析中的伪路径问题以及路径敏化算法，分析了影响逻辑门和互连线延时的因素。

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In this paper, on the basis of static timing analysis, a new method is employed to enhance the efficiency of FPGA partition by extracting the information of critical path-delay.

文章在静态时序分析的基础上，提出了一种利用关键路径时延信息提高FPGA分割效率的方法。

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Static timing analysis is widely applied in timing verification because of its high speed and great capacity. The gate delay computing is a critical part of static timing analysis.

静态时序分析由于速度快和容量大而广泛应用于时序验证，而门延时的计算则是静态时序分析中的关键部分。

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Finally USES FPGA platform for BIST functions and timing verification, and through design compiler, static timing analysis, automatic placing and routing to achieve a BIST system layout.

最后利用FPGA平台实现了BIST的功能和时序验证，并通过综合、静态时序分析、自动布局布线实现了BIST系统的版图设计。

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Finally USES FPGA platform for BIST functions and timing verification, and through design compiler, static timing analysis, automatic placing and routing to achieve a BIST system layout.

最后利用FPGA平台实现了BIST的功能和时序验证，并通过综合、静态时序分析、自动布局布线实现了BIST系统的版图设计。

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