What are several factors to improve propagation delay of standard cell?
哪些因素可以影响标准单元的延迟？
Then the circuit network is generated using resistance interconnect model and standard cell equivalent current model.
提出了一种对基于标准单元芯片计算其电源线网的静态电压降的分析方法。
The modularization of filter logical architecture is especially suitable for layout design of ASIC with standard cell.
过滤器逻辑结构的模块化特别适宜用标准单元法来实现ASIC(专用集成电路)的版图设计。
This application describes comparing two standard cells and comparing a standard cell with a precision voltage reference.
下面的应用实例说明比较两个标准电池以及将标准电池和精密电压参考标准进行比较的情况。
The design and manufacture of electronic standard cell are reported, and the general framework is discussed as well.
介绍了自制电子标准电池的设计思想及有关参数。
A non-clock delay-ring A/D converter is presented, which is based on standard cell library and not sensitive to process variation.
提出了一种无需外部时钟、可以部分抵消工艺偏差、基于标准单元的延迟环A/D变换器。
The decomposition of multilevel logic functions based on standard cell libraries used in ASIC synthesis is presented in the paper.
本文提出在ASIC综合技术中基于标准单元库的多级逻辑函数分解技术。
Low voltage measurement applications include standard cell comparisons and high resolution temperature measurements and microcalorimetry.
低电压测量的应用包括标准电池的比对、高分辨率的温度测量以及微量热计等。
This IC design system applicable to the standard cell method is an automatic layout system used for designing Application Specific ICs (ASIC).
采用标准单元方法的集成电路设计系统是一个用于专用集成电路(ASIC)设计的自动布图系统。
In general, the width of the largest standard cells should be no more than five or six times the width of smallest standard cell of the same type in your library.
一般来说，在你的单元库中相同类型的最大宽度标准单元不应超过最小标准单元宽度的5到6倍。
MCNC(microelectronics centre of north-carolina) standard cell benchmarks are experimented and the results show that the algorithm can make the longest path delay improvement up to 31%.
对MCNC标准单元测试电路中组合和时序电路的实验结果显示， 电路经过时延驱动优化布局后的最大路径时延最多减少了31%。
As the foundation of modern digital circuit design, the Standard Cell library and its performance improvement has tremendous effect on the capability of digital circuit.
标准单元库作为数字电路设计的基础，其性能的改善对整体电路性能的提高有着十分重要的作用。
The implementation carries out the standard-cell design of RS decoder, improves the velocity of decoding efficiently and simplifies the hard - ware design.
该方法实现译码器的标准单元化设计，并且有效提高译码的速度，简化硬件设计。
What's fueling the popularity of FPGA technology to the point that it's now replacing both gate array and standard-cell ASICs in many applications?
哪些因素在推动着FPGA技术的普及，以至于FPGA在许多应用中正在替代门阵列和标准单元asic ？
What's fueling the popularity of FPGA technology to the point that it's now replacing both gate array and standard-cell ASICs in many applications?
哪些因素在推动着FPGA技术的普及，以至于FPGA在许多应用中正在替代门阵列和标准单元asic ？
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