This paper presents the TAM optimization and test scheduling algorithm for multi-clock SOC, and it aims at decreasing test time of multi-clock SOC.
该文提出了用于多时钟域soc的TAM优化与测试调度算法，以减少多时钟域soc的测试时间。
Experimental results for two ITC '02 SOC benchmark show that the pair balance-based test scheduling achieves less test time compared to the previous approaches.
在ITC'02基准电路上的实验结果验证了基于对平衡测试调度算法的有效性。
A deterministic algorithm is proposed for System-on-Chip (SOC) test scheduling.
提出了一种确定性的片上系统(SOC)测试调度算法。
Test scheduling determines an assignment of cores to test access mechanism such that the overall test application time of system on chip (SOC) is minimized.
测试调度是系统芯片测试的一个重要方面，它用于确定把芯片上芯核的测试集分配给测试存取机制的方法，以使得总的测试时间最少。
Test scheduling determines an assignment of cores to test access mechanism such that the overall test application time of system on chip (SOC) is minimized.
测试调度是系统芯片测试的一个重要方面，它用于确定把芯片上芯核的测试集分配给测试存取机制的方法，以使得总的测试时间最少。
应用推荐