With a magic square panel controlled by a sequence controller, wonderful dynamic patterns can be displayed.
用时序控制器控制幻方光屏，可获得优美的动态图案。
This article mainly introduces the methods and steps of compiling the pro- gram of step sequence controller by computer.
本文主要介绍用计算机编制步进式控制器的程序设计的方法和具体步骤。
This paper presents the principles, designing methods and designing parameters of the multistage sequence controller built with a 555 IC power.
该文介绍了555集成电路组成多级顺序控制器的原理和方法及设计参数。
The Update Sequence Number on a domain controller is incremented by both types of write operations, which means that it is incremented whenever changes are replicated in from another DC.
两种类型的写入操作都可增加域控制器上的更新序列号，这意味着每当从其他DC复制了更改时，该序列号都会增加。
To improve understandability of the sequence diagram, I introduced a generic use case controller object to mediate the messages received by the human customer actor.
为了使序列图更易理解，我引入了一般的用例控制器对象来为消费者参与者收到的信息提供中介。
A typical sequence of steps involved in the operation of the Controller function is.
Controller功能操作所涉及的步骤顺序通常是。
Controller — Controls sequence and execution of order processing.
控制器——控制器顺序执行订单处理。
These are documented in the model with sequence diagrams and class diagrams, which would include the specification of a reservation entity and a controller class (for entity management).
在模型中使用包含保留实体的详尽规格和控制器类(用于实体管理)的程序表和类表把它们纪录成文档。
Type of fault, phase sequence, value of faulty current and breaking action time will be indicated on the intelligent controller promptly if breaker turns off because of faults.
断路器遇故障分断后，智能控制器能显示出故障类别、故障相序及故障电流值、分断动作时间值。
The sequence control switches of batch controller are used to start, reset and stop thd batch sequence.
批处理控制器的程序控制开关用于启动，复位及停止批程序。
This kind of video controller can accurately generate video control time sequence of two frame graphics data in the same time.
系统以单处理器、单视频控制器同时驱动两路画面不同的彩色显示器，完成复杂画面的实时生成。
The design of the PCI bus in the interspaced ordonnance, and the realization of the sequence state machine in the PCI interface controller is given.
给出了PCI总线配置空间的设计以及PCI接口控制器中时序状态机的实现。
PCI target interface controller design with FPGA is proposed. And the realization of the complication of the access sequence to the BUS interface controller is expressed by sequence state machine.
给出了一种基于FPGA实现PCI总线目标模块接口控制器的设计方案，用时序状态机来实现总线访问操作复杂的时序。
A novel time - varying fuzzy controller is presented to compute the variable on - OFF signal sequence to achieve control requirements.
提出了一种新颖的时变模糊控制器计算可变开-关信号序列从而达到控制输出要求。
A static communication protocol can be used to independently design the communication sequence and the controller, V-K iteration algorithm is used to design the optimal periodic controller gain.
采用静态通信序列，使通信序列和控制器可以分别设计，应用V -K迭代算法设计最优周期控制增益。
The hardware structure is introduced, emphatically the communication interface circuit. The time sequence logic problem between CAN controller chip SJA1000 and AT91RM9200 is solved using the CPLD.
介绍了新型通信控制器的硬件设计，着重描述了通信接口部分，用复杂可编程逻辑器件CPLD解决了CAN 控制器芯片SJA 1000与AT 91RM 9200之间的时序逻辑问题。
While its time sequence and access mechanisms are very complex, it is necessary to design SDRAM controller to improve the efficiency of accessing.
但SDRAM的控制时序和机制较复杂，因此需要设计sdram控制器以提高其读写效率。
While its time sequence and access mechanisms are very complex, it is necessary to design SDRAM controller to improve the efficiency of accessing.
但SDRAM的控制时序和机制较复杂，因此需要设计sdram控制器以提高其读写效率。
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