Your surgical procedure will depend on whether your project just needs the electronic pulse generator. or a clock with working hands that continues to tell time.
你的方法取决于你的项目是只需要那块电子脉冲发生器，还是带有指针，可以继续报时的时钟。
"With a laser pulse, you can tap that shell and make it ring like a bell," said physicist Till Rosenband of NIST, who built the existing quantum-logic clock.
“激光脉冲轻拍壳层产生了像铃声一样声音”，国家标准和技术研究所的物理学家Till Rosenband说，现有的量子逻辑时钟是由他开发的。
It is called a shift register because the data is shifted through the register by one bit position on each clock pulse.
这就是移位寄存器，因为数据在每一个时钟脉冲的作用下通过寄存器会移动一位。
After the stop bit is received, the device will acknowledge the received byte by bringing the Data line low and generating one last clock pulse.
在收到停止位之后，设备将通过拉低数据线，生成最后一个时钟脉冲来应答收到的字节。
Simulation of relative delays between Data and Clock pulse trains in 0.1 microseconds increments to 3.1 microseconds.
对于数据和时钟脉冲列之间的相关延迟的模拟，以0.1微秒为递增单位增加到3.1微秒。
These functions are realized by the circuits of power, clock, memory, ultrasonic pulse signal occurs and handle, temperature gathered and serial communication in system.
这些功能的实现是通过系统中电控部分的电源、时钟、存储、超声波脉冲信号发生、处理、温度采集、串行通信电路实现的。
The latter takes PWM (Pulse-Width Modulation) control and ZVS control as its target, synchronizes with clock to realized its driven waveform. In addition, adaptive dead-time control is analyzed.
由程序综合的控制电路以PW M控制和ZVS控制为目标，并由时钟同步，实现了对驱动波形的控制。
Through the software the practical watching clock for interface module of GPS is implemented and the dependence on the PPS pulse is reduced.
GPS接口板通过软件方式实现实用化的守时钟，降低对单个PPS秒脉冲的依赖性。
A method for subdividing the grating pulse signal by means of using computer clock pulse is presented in this paper.
本文介绍了一种利用计算机时钟脉冲细分光栅脉冲信号相位的方法——改进型时钟脉冲细分技术。
The parallel loading of the flip-flop can be synchronous (i. e., occurs with the clock pulse) or asynchronous (independent of the clock pulse) depending on the design of the shift register.
触发器的并行加载可以是同步的(即在时钟脉冲到达时发生)或异步的(不依赖于时钟)，这取决于移位寄存器的设计。
Based on pulse counting principle, the high precision time interval can be obtained by measuring the number of the high-frequency reference clock through it.
设计了一种高精度时间间隔测量模块，该模块由单片机控制，采用脉冲计数原理，通过测量时间间隔内高频参考时钟个数，得到被测时间间隔的精确值。
Frequency controlled data (m) plus an accumulative phase data output by a phase register in an N-bit adder when a clock pulse comes, the result is sent to the input port of the phase register.
每来一个时钟脉冲，N位加法器将频率控制数据m与相位寄存器输出的累加相位数据相加，并将结果送相位寄存器输入端。
A timer called a clock releases precisely timed electrical signals that provide a regular pulse from the processor's work.
一个称作时钟的计时器准确地发出定时电信号，该信号为处理器工作提供有规律的脉冲。
The hardware includes GPS receiver, pulse peak acquisition card, GPS clock module and industrial computer.
系统硬件部分包括GPS接收机、GPS时钟模块、脉冲峰值采集卡及工控机。
Based on the construction of traditional flip-flop, we propose a novel edge-triggered flip-flip using one latch controlled by narrow pulse according to race-hazard of clock.
在传统触发器结构的基础上，本文提出了单闩锁结构边沿触发器设计，它通过利用时钟信号的竞争冒险产生窄脉冲控制单一锁存器以实现触发器的一次状态转换功能。
The conversion speeds and results of ADC0809 analog-to-digital converter are accurate tested and analyzed by using multi-master clock pulse with different frequency and pulse width.
使用多组不同频率和不同脉宽的工作时钟，定量测定分析ADC0 80 9模数转换器的转换速度和转换结果。
Pulse train produced by clock circuit of the transducer has improved waveform and output waveform is stable implemented by mono-stability circuit.
变送器触发源电路保证产生的脉冲串具有改善的波形，单稳态电路实现输出波形的稳定。
Pulse train produced by clock circuit of the transducer has improved waveform and output waveform is stable implemented by mono-stability circuit.
变送器触发源电路保证产生的脉冲串具有改善的波形，单稳态电路实现输出波形的稳定。
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