CPU core was simulated and synthesized by EDA tools after combine all units. In the end, CPU core was implemented in programmable logic device.
所有的功能模块组合起来后，通过EDA工具进行CPU内核的逻辑综合和功能仿真，最后在可编程逻辑器件上实现这个完整的CPU内核。
With the complex programmable logic devices (CPLD) a wide range of applications to the development of EDA tools as a means of the use of VHDL.
随着复杂可编程逻辑器件（CPLD）的广泛应用，以EDA工具作为开发手段，运用VHDL语言。
The programmable logic device and VHDL is used as input tools, which have simple software interface, good reliability and practical value.
该设计采用可编程逻辑器件，VHDL硬件描述语言为输入工具，接口简单，可靠性高，具有一定的实用价值。
The programmable logic device and ABEL-HDL is used as input tools, which have simple software interface, good reliability and practical value.
该设计采用可编程逻辑器件，ABEL HDL硬件描述语言为输入工具，接口简单，可靠性高，具有一定的实用价值。
Overview of Commercial Devices, Programmable Logic (PAL), FPGA Architectures, and Software Tools.
商用器件概述，可编程逻辑(PAL)，FPGA架构，软件工具。
Overview of Commercial Devices, Programmable Logic (PAL), FPGA Architectures, and Software Tools.
商用器件概述，可编程逻辑(PAL)，FPGA架构，软件工具。
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