• A processor interrupt request is generated on completion of a transaction.

    在完成事务时产生处理器中断请求。

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  • Each processor on the CPU has its own CSA (current save area) pointer that points to the MST that is to be used when a thread or interrupt handler is interrupted or swapped due to context switch.

    CPU上的每个处理器都拥有自己的CSA(当前保存区)指针,指向当线程或中断处理程序由于上下文切换而被中断或交换时使用的MST。

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  • In particular, the Cell processor includes an interrupt controller and an IOMMU implementation, both of which are incompatible with those supported by older kernel versions.

    具体来说,Cell处理器包括一个中断控制器和一个IOMMU的实现,它们与早期的内核版本的支持都是不兼容的。

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  • If a D-cache miss (the processor fails to find data in the D-cache) occurs, an interrupt is raised so that the corresponding register can record this event by increasing its value.

    如果发生D -cache失效(处理器无法在D - cache中找到数据),那么发出一个中断,让相应的寄存器可以通过增加它的值记录这一事件。

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  • But what happens if the interrupt routine executes in the same processor as the code that took out the lock originally?

    但是如果运行在同一个处理器中的中断例程取得了先前的锁会发生什么呢?

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  • The values in the prev and intpri fields help in determining whether the processor is running a thread or an interrupt handler.

    prev和intpri字段中的值帮助判断处理器是在运行线程还是在运行中断处理程序。

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  • When an interrupt occurs the current state of the processor is saved and an interrupt service routine is executed.

    当一个中断发生,当前的处理器状态被保存并且中断服务程序开始运行。

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  • When an interrupt occurs, the current state of the processor is saved and an interrupt service routine is executed.

    当一个中断发生,当前的处理器状态被保存并且中断服务程序开始运行。

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  • When the interrupt service routine exits, control of the processor is returned to whatever part of the software was previously running.

    当中断服务程序退出,对处理器的控制权转到先前运行的那个软件上。

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  • This table contains the processor"s mapping between interrupts and interrupt service routines and must be initialized by the programmer."

    这个表格包含中断与中断服务程序之间的处理器的映射,必须由程序员进行初始化。

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  • A method of performing a fast interrupt in a digital data processor having the capability of handling more than one interrupt is provided.

    执行快速的方法中断在数字数据处理器具有处理更多的能力不是提供一个中断。

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  • And this thesis also analyzed the characteristics of packet receiving interrupt handler and it's Max interference on the other tasks on the same processor with lower priorities.

    此外本文还分析了报文接收中断处理程序的时间特性和它对节点上其它任务最大响应时间的影响。

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  • The processor read the FIFO storage data using the interrupt method in the procession of data processing.

    在进行数据处理过程中,处理器以中断方式读取FIFO缓存结果。

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  • An interrupt is usually defined as an event that alters the sequence of instructions executed by a processor.

    中断通常定义为改变处理器执行指令顺序的事件。

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  • When the interrupt service routine exits control of the processor is returned to whatever part of the software was previously running.

    当中断服务程序退出,对处理器的控制权转到先前运行的那个软件上。

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  • Precise interrupt is the key to debugging in any processor.

    精确中断是实现软中断调试的关键。

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  • Precise interrupt is the key to debugging in any processor.

    精确中断是实现软中断调试的关键。

    youdao

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