A performance evaluation and modeling method for synthesizable arithmetic circuit is proposed.
提出了一种可综合算术运算单元的性能评估与建模方法。
The choice, modeling and simulation of current rich types of communicators are essential for an accurate evaluation and optimization of the global performance of a NoC.
当前丰富多样的通信实体的选择、建模和仿真，对于精确评估和优化片上网络的整体性能非常重要。
The choice, modeling and simulation of current rich types of communicators are essential for an accurate evaluation and optimization of the global performance of a NoC.
当前丰富多样的通信实体的选择、建模和仿真，对于精确评估和优化片上网络的整体性能非常重要。
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