It maps a 2-d logic space onto physical parallel memory modules.
该存储系统完成了二维逻辑空间到物理空间上并行存储器模块的映射。
This dissertation focuses on the analysis, design and implementation of data-parallel memory system for Tiled Stream Processor.
论文的研究工作着眼于分片式流处理器的数据并行存储系统的分析、设计和实现。
While that little port isn't a big problem for most visual jobs, it's a hassle for parallel computing that works the CPU, GPU, and memory all in close association.
虽然这个小小的接口对大部分显示工作来说并不是什么大问题，但它却无法应付CPU、GPU和内存紧密结合的并行运算。
These factors allow a multiplayer online game engine to take advantage of the power of parallel database technology, such as symmetric multiprocessors, and other large memory systems.
这些因素使多玩家在线游戏引擎可以利用并行数据库技术，比如对称多处理器，以及其他大内存系统。
Merge-sort is not an inherently parallel algorithm, as it can be done sequentially, and is popular when the data set is too large to fit in memory and must be sorted in pieces.
合并排序本身并非并行算法，因为它可以顺序执行。当数据集太大，内存无法容纳，必须分片保存的时候，经常使用合并排序。
Kanerva's memory algorithm could do several marvelous things that parallel what our own minds can do.
卡内尔瓦的记忆算法能做一些可媲美于人类思维的不可思议的事情。
On Shared memory systems, High Performance FORTRAN is a language suited for parallel programming.
在共享内存系统中，HighPerformance FORTRAN是一种非常适合并行编程的语言。
(in clusters, also known as massively parallel processors (MPPs), they don't share the same memory; we will look at this in more detail.)
(在集群中，这也称为大规模并行处理器(massively parallel processor, MPP)，它们并不需要共享内存；稍后我们将更详细介绍这方面的内容。)
His recent focus has been on high performance computing including in-memory data grid, parallel and grid computing.
他最近的关注点是高性能计算，包括内存数据网格、并行计算和网格计算。
But in a parallel supercomputer with a sparse, distributed memory, the distinction between memory and processing fades.
在采用稀疏分布式内存的超级计算机里，记忆与数据处理之间的差异消失了。
PLINQ is a declarative model for performing data parallel queries against XML and in-memory objects.
PLINQ是一个对XML和内存对象进行并行查询的声明式的模型。
This article shows you how to set up an in-memory grid of data, and then perform computation and data updates in a distributed and parallel manner across the grid.
本文介绍如何设置内存中数据网格，然后以分布式和并行方式跨网格执行计算和数据更新。
While the job will no longer run in parallel, or use multiple CPUs, it will use less memory and run faster because the InfoSphere DataStage server no longer has to swap.
然而，任务再无法并行运行，或使用多个CPU，它会使用更少的内存，并会运行得更快，因为InfoSphereDataStage服务器不需要再进行内存交换。
Aim CDT (categorical data type) is a parallel model basing on category theory, and this paper discusses the CDT construction of the memory type in details.
目的CDT(范畴数据类型)是以范畴理论为基础的并行计算模型，本文对存储器类型的CDT构造进行深入的探讨。
If the database is partitioned, or intra-parallel enabled, or connection concentrator enabled, then one segment is used for Application Group Shared Memory.
如果数据库是分区的，或者启用了intra - parallel或连接集中器，那么数据库共享内存中有一个段被预留给应用程序组共享内存。
The EBCOT design USES parallel processing and dynamic memory control (DMC) architecture, which greatly speeds up the coding process and achieves higher hardware utilization.
EBCOT采用的并行运算和动态内存控制(DMC)结构，在保证编码速度的前提下，最大限度减小了片内小波系数缓存量和访问频率。
Parallel preconditioning algorithm based on multiprocessor systems with local memory is stressed, so that two kinds of PPCG. PPCG1 and PPCG2 are proposed.
着重讨论了基于自带存储器的多处理机系统的并行预处理算法问题，并由此提出了两种PPCG法：PPCG1和PPCG2法。
Then based on partial suffix tree, presents a new parallel algorithm of suffix tree, which can construction large suffix tree in memory and more perfect to very large sequences.
在部分后缀树的基础上提出了后缀树的并行算法，解决了后缀树在应用上的内存瓶颈问题，因此更适合大规模的序列分析。
This paper presents a new control flow parallel computer architecture using two types of memory.
本文介绍一个新的具有两种类型存储器的控制流并行计算机结构。
A memory allocation algorithm was developed to maximize parallel data access and make full use of CPU processing ability to improve real-time performance of embedded multimedia applications.
为了提高嵌入式多媒体应用的实时性能，提出了一种最大化数据并行访问以便充分发挥CPU处理能力的片上存储器分配方法。
The time differences and memory cost between parallel FDTD and traditional one are also compared.
比较了并行和传统FDTD方法运算耗时与内存消耗的差异。
Compared with the full parallel architecture, the memory cost of the designed processor decreases, thus the speed is higher than that of the SDF pipeline architecture.
该处理器内存资源消耗较并行结构有所减少，运算速度较单独的SDF流水线结构有所提高。
DSP technologies have applied in every field of digital signal processing because of its parallel multiplier, pipeline structure and fast On-Chip memory.
数字信号处理(dsp)具有并行的硬件乘法器、流水线结构以及快速的片内存储器等资源，其技术广泛地应用于数字信号处理的各个领域。
In this system the master-slave parallel structure is composed by DSP and PC. The dual machine high speed communication is implemented by the Shared memory.
该系统采用DSP与PC构成主从式并行结构，共享存储器实现双机高速数据通信。
In this paper, the way to communicate by Shared memory is concretely analyzed, and the parallel genetic algorithms based on the way of communication by Shared memory is provided.
文章具体分析了共享存储器的通信方法，提出了基于共享存储器通信方式的并行遗传算法。
Using CUDA C language, using CUDA texture memory, image stretching parallel implementation.
说明：使用CUDAC语言，利用CUDA纹理内存，实现图像拉伸的并行实现。
Contains topics that outline what to consider when you are building on a multi-processor system, for example, building in parallel and using memory efficiently.
包含概述在多处理器系统中生成时的注意事项的主题，例如并行生成以及有效使用内存。
The method of message passing is widely used in some parallel computers, especially in distributed memory parallel computers.
消息传递方式是广泛应用于一些并行机，特别是分布式存储并行机的一种模式。
The method of message passing is widely used in some parallel computers, especially in distributed memory parallel computers.
消息传递方式是广泛应用于一些并行机，特别是分布式存储并行机的一种模式。
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