It allows 128 interface ICs to connect with each other on one bus, which makes it easy to use the card in multi-computer system.
选择的通信接口芯片允许多达128个同样的接口芯片接在同一总线上，为多机通信的实现提供了极大的方便。
The serial interface bus IEEE1394 with high performance has been used in multi-mainframe VXI test system.
高性能串行接口总线IEEE1394目前已用在多主机箱VXI测试系统中。
The system utilizes CPLD to realize logical and timing control between DSP and multi-channel ADC. The interface between DSP's HPI and PCI bus is employed to achieve high-speed data transmission.
该系统采用CPLD实现了DSP与多通道adc的逻辑和时序控制，通过DSP的HPI与PCI总线接口设计实现了采集数据的高速传输。
Thus, the interface design of multi-DSP and CPCI bus with FPGA and bridge chip PCI9656 is described in detail.
本文详细介绍如何通过FPGA和桥接芯片pci9656实现多dsp与CPCI总线的接口设计。
CAN bus is introduced as the communication interface for different modules and it supports the multi joints 'real-time control effectively.
采用CAN总线作为模块间的通信接口，有效地支持了多关节实时控制。
CAN bus is introduced as the communication interface for different modules and it supports the multi joints 'real-time control effectively.
采用CAN总线作为模块间的通信接口，有效地支持了多关节实时控制。
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