This program memory addressing logic is handled by a register referred to as a program counter.
程序存储器的导址逻辑是由寄存器来实现的，这个寄存器叫程序计数器。
An interface between devices and a computer that has memory addressing potential and data transferring ability.
设备与计算机的接口设备，它具有存储器寻址能力和数据传送的能力。
Relevant theories as suppression of numerical oscillating, general ICCG pointer memory addressing, etc. are studied.
对数值振荡的抑制、通用ICCG指针存储寻址等相关理论进行了研究。
Line 18 in Listing 2 illustrates the memory indirect addressing mode.
清单2中的第18行演示内存直接寻址模式。
There are several other ways of initiating IPC using ACE, like shared memory or UNIX-style socket addressing (the ACE_LSOCK* group of classes), which this article does not address.
还有使用ACE 实现IPC的其他方法，比如共享内存或UNIX 风格的套接字寻址（ACE_LSOCK*组中的类）。
For example, there are no addressing exceptions since all Pointers get aligned and truncated to the local store size when attempting a memory access.
例如，根本就不存在寻址异常，因为所有的指针都是对齐的，并且在视图访问某处内存时都根据本地存储的大小进行了截断。
Here, memory indirect addressing mode (line 33) is used to access the command table along with an offset in ESI (and EDI) and a multiplier.
这里使用内存间接寻址模式(第31行)访问命令表，还使用了ESI(和EDI)中的偏移量和一个乘数。
The register indirect addressing mode uses a register to specify the whole address for the memory access. This is used for numerous situations, including, but not limited to
寄存器间接寻址模式使用一个寄存器来指定内存访问的整个地址。
JSR-133 is addressing issues regarding the memory model, however, double-checked locking will not be supported by the new memory model. Therefore, you have two options.
JSR- 133是有关内存模型寻址问题的，尽管如此，新的内存模型也不会支持双重检查锁定。
The 64-bit addressing provided by the Itanium architecture removes the constraint on memory-addressing capability in 32-bit computing.
Itanium体系结构提供的64位寻址去除了32位计算中内存寻址能力上的约束。
On the other hand, we are aimed to remove the memory redundancy of the previous linear skewing interleave scheme and try to support modulo addressing.
在另一方面，本文致力于研究如何改进传统的基于线性偏差的地址交织策略来解决其存储器冗余和无法支持模寻址的问题。
The base 256MB of main memory can be expanded to 16GB for faster performance and exploitation of 64-bit addressing capability required by large database applications.
该基地256MB的主内存可以扩展至16GB的更快的性能和开发的64位处理能力要求的大型数据库应用。
The paper introduces the CPU structure, Memory composition, Peripheral resources and the addressing modes of DSP.
本文讲述了DSP的CPU结构、存储器构成、外设资源和指令寻址方式等。
The paper introduces the CPU structure, Memory composition, Peripheral resources and the addressing modes of DSP.
本文讲述了DSP的CPU结构、存储器构成、外设资源和指令寻址方式等。
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