In the existing architecture we modified, the dumb.c draw function copies the source pixel memory area into the destination memory area.

在修改后的体系结构中，dumb . c绘制函数将源像素内存区复制到目标内存区。

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In the FPGA design, the pipelined technique is applied and the correction coefficient is stored in the interior memory of FPGA, meanwhile, blind pixel compensation is implemented.

利用FPGA在硬件上实现了该算法，内部采用流水线技术，校正系数存储在FPGA的片内存储器中并实现了盲元补偿。

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In the FPGA design, the pipelined technique is applied and the correction coefficient is stored in the interior memory of FPGA, meanwhile, blind pixel compensation is implemented.

利用FPGA在硬件上实现了该算法，内部采用流水线技术，校正系数存储在FPGA的片内存储器中并实现了盲元补偿。

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