The said digital gate circuit macro model can be used to perform a logical simulation for gate circurit and the digital circuit formed by the gate circuit.
提出了一种建立数字门电路宏模型的方法 ，采用该方法建立的门电路宏模型可以对门电路以及由门电路构成的数字电路进行逻辑仿真 。
The said digital gate circuit Marco model can be used to perform a logical simulation for gate circuit and the digital circuit formed by the gate circuit.
本文提出了一种建立数字门电路宏模型的方法，采用该方法建立的门电路宏模型可以对门电路，以及由门电路构成的数字电路进行逻辑仿真。
Using the device, the demonstrating and exploring experiments on logical circuit, which includes AND gate, NOT gate, OR gate, are illustrated.
利用该实验仪做了与门、非门、或门基本逻辑电路的演示实验及探究实验。
GFMS is a Gate and Function Block of mixed-level simulation system, which is designed for experiment of Digital Logical.
GFMS是针对《数字逻辑》课程实验而设计的数学电路模拟系统。
GFMS is a Gate and Function Block of mixed-level simulation system, which is designed for experiment of Digital Logical.
GFMS是针对《数字逻辑》课程实验而设计的数学电路模拟系统。
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