A new high-speed TLB architecture is designed for accelerating the address transition rate from linear address to physical one in micro processors.
为了加快微处理器中线性地址向物理地址转换的速度，提出了一种高速tlb结构。
A new high-speed TLB architecture is designed for accelerating the address transition rate from linear address to physical one in micro processors.
为了加快微处理器中线性地址向物理地址转换的速度，提出了一种高速tlb结构。
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