A two-level synthesis strategy was proposed and the synthesis procedure was presented.
提出了一个两水平综合策略，给出了热泵精馏综合步骤。
This paper presents a formalized description of scheduling in the high-level synthesis.
本文介绍高层次综合中调度问题的形式化描述。
Research on the Algorithm and Methodology of Integrating High Level Synthesis and Floorplan;
介绍了高层次综合与布图规划相结合的基本方法与技术及其研究进展。
Power aware algorithms and recent researches in high-level synthesis procedure are reported in this paper.
介绍了高层次综合阶段面向电路功耗的主要优化方法及其研究进展。
This paper adopts automatic model mapping to realize system-level synthesis and make use of component reuse to optimize the design space.
通过自动化的模型变换来实现系统级综合，利用组件重用来优化设计空间搜索，因此能够提高系统设计的性能和开发效率。
The research on "integrating high level synthesis and floorplan" is a very important part in the research on electronic design automation.
介绍了高层次综合与布图规划相结合的基本方法与技术及其研究进展。
The verification automaton and the algorithm for abstracting critical path are proposed to verify high level synthesis process automatically.
为了便于自动验证高层综合过程，给出了验证自动机模型。
Constant components and output opened ports in the result of high level synthesis lead to explicit redundancy in gate level technology mapping.
高级综合结果中常量元件和输出悬空端口导致门级工艺映射结果中存在显式冗余。
This paper introduces VHDL and its feature briefly. At meantime, it describes high level synthesis and high level simulation technology in detail.
本文简单介绍了VHDL硬件描述语言及其特色，并就高层次综合、高层次仿真及验证等技术的主要功能和特点，作了较为详细的描述。
This paper researched the ASIC design in the automation system of a kind of AUV with high-level design method based on VHDL high - level Synthesis.
本文采用基于VHDL高级综合的高层次设计方法对某型水下航行器自控系统的集成设计进行了研究。
In this thesis, we introduce some basic knowledge of high-level synthesis, and research feather the high-level optimization techniques for low power.
本文综述了高层次综合的相关理论，并对高层次综合阶段的功耗优化技术进行了研究。
In the high level synthesis, scheduling and allocation are dependent on each other. Scheduling may be done before, after or at the same time as allocation.
在高级综合中，调度与分配过程是相互依赖的，调度可在分配之前、之后或与分配同时进行。
Span multi-level synthesis engine oil, has excellent high temperature wear resistance and smooth low-temperature startup performance, Four Seasons General.
大跨度多级合成型发动机油，具有卓越的高温抗磨性能和顺畅的低温启动性能，四季通用。
The technology mapping, which transforms a technology independent structure into a particular technology specification, is a important step in the process of high-level synthesis.
工艺映射作为高级综合中的一个重要的处理阶段，将与工艺无关的结构转换为特定的工艺描述。
So it has distinctive meaning to make VHDL as the input language in high-level synthesis, because it can combine the virtue of it as industry standard and high-level synthesis itself.
因此将VHDL语言作为高级综合的输入描述可以把它作为工业标准的优点与高级综合的自身优点结合起来，其意义十分明显。
Traditional methods have been hard to resolve the low power problem encountered in circuit design, while high-level synthesis techniques may greatly optimize the power consumption of circuits.
传统的方法已经难以解决低功耗的问题，而高层次综合设计能够最大程度地实现电路的功耗优化。
Coloring of conflict graphs has been used in high level synthesis to map operators, values and data transfers onto Shared resources, however, finding a minimum sized coloring is NP hard problem.
高层次综合中通过对冲突围着色方式把操作、变量值、数据传输映射到共享资源中，然而寻找图着色所需的最小颜色数目是个NP难题。
Each level of decomposition forces design decisions, providing ongoing synthesis, coupling of requirements and design specifications, and increasing system detail.
每个分解级别都强制进行设计决策，提供正在进行的合成，连接需求和设计规格说明，并增加系统详细内容。
Andit turned out that this was very good timing because the complexity ofcircuits was at the level where synthesis was necessary.
和事实证明，这是非常好的时机，因为电路的复杂性，在合成的水平是必要的。
The fifth level, synthesis, consists of creating something that did not exist before by integrating 'information that had been learned at lower levels of the hierarchy.
第五个层次，综合，是通过创建一些以前不存在的内容组成的，这种创建是通过对在分类中较低层次已习得知识的整合来实现的。
Because the behaviors of digital system can be described by register transfer level (RTL) behavior exactly, RTL synthesis becomes the mainstream design method in EDA domain.
由于寄存器传输级(rtl)行为描述可以精确地确定数字系统的操作，所以寄存器传输级综合成为当前EDA行业的主流设计方法。
As the behavior of digital system can be fully described by the register transfer level (RTL) behavior descriptor, so RTL synthesis has become the mainstream design method in EDA domain.
寄存器传输级(rtl)综合实现从rtl行为描述到门级结构描述的转换，是目前EDA设计行业的主流设计方法。
Those that have already created a synthesis alter can also take the work with our kingdom to a new level.
那些已经创造了合成圣坛的人们，也可以以新的水平和我们王国一起工作。
Objective to study the role of the synthesis and degradation of collagen at the transcription level during liver fibrogenesis due to schistosomiasis japonica in rabbits.
目的从转录水平研究兔日本血吸虫病肝纤维化形成过程中胶原的合成与降解的规律。
Objective To explore the geographic distribution for the level of medical services of synthesis hospitals in Shanxi province.
目的了解山西省综合医院医疗服务水平地理分布状况。
DPD is the first rate-limiting enzyme in the catabolism of uracil and thymine, and affects DNA synthesis by decreasing the level of uracil and thymine, the necessary material for DNA synthesis.
DPD是尿嘧啶和胸腺嘧啶分解过程中的第一限速酶，可降低用于DNA合成的尿嘧啶和胸腺嘧啶的水平而影响DNA的合成。
Functions of logic synthesis are to transform and optimize the combinational logic functions and produce the pure logic level structural description.
逻辑综合的功能是对组合逻辑函数的描述进行转换和优化，生成与逻辑功能描述等价的优化的逻辑级纯结构描述。
Conclusion: Theanine has the effect of delaying exercise-induced fatigue possibly through enhancing DA level and inhibiting the synthesis or secretion of 5-ht in brain.
结论：茶氨酸具有延缓运动性疲劳作用，其机制可能与茶氨酸增加脑组织中DA含量，抑制5 - HT的合成和释放等效应有关。
Thus the preferential exploitation of the vitric tuff in high level is synthesis of zeolite molecular sieves and a series of products made from the synthetic zeolites.
因而，沸石分子筛的合成及其系列产品开发是玻屑凝灰岩深层次开发利用的优先发展方向。
The performance evaluation synthesis value of listed companies adopt level analytic method carrying on five adding power to acquire.
上市公司的绩效评价综合值是采用层次分析法进行五个方面的加权获得。
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