The serial communication interface chip design was realized by application of schematic diagram and VHDL language.
采用自顶向下的设计方法，用原理图和VHDL语言这两种输入对串行通信接口芯片进行设计。
Having analyzed the difference of the two languages, this paper provides a method of translating C language into VHDL language, and the method is implemented.
文章通过分析两种语言的区别，提出并实现了适于表达C语言描述内容的VHDL结构形式，并对几种C语言结构提出合理的转换方案。
Summarized the concurrent statements and sequential statements of VHDL language, and described their types and the characteristic.
简单概述了VHDL语言的并行语句和顺序语句，描述了其种类和特点。
The logic synthesis of VHDL language is a method that the description of higher abstract hierarchy is shifted to lower one automatically.
VHDL语言的逻辑综合就是将较高抽象层次的描述自动转换到较低抽象层次描述的一种方法。
The paper studies the hardware of the interface circuit and how to control the sweep fingerprint sensor to complete the task of high quality fingerprint gathering with hardware language VHDL.
重点研究接口电路的硬件组成和如何采用硬件语言VHDL编程控制滑动式指纹传感器以完成高质量的指纹采集工作。
On the base of analyzing the structure and the design difficulty of the asymmetric synchronous FIFO, an asymmetric synchronous FIFO is achieved by using VHDL language and FPGA in this paper.
本文在分析了非对称同步fifo的结构特点及其设计难点的基础上，采用VHDL描述语言，并结合FPGA，实现了一种非对称同步fifo的设计。
So it has distinctive meaning to make VHDL as the input language in high-level synthesis, because it can combine the virtue of it as industry standard and high-level synthesis itself.
因此将VHDL语言作为高级综合的输入描述可以把它作为工业标准的优点与高级综合的自身优点结合起来，其意义十分明显。
The paper introduces the giving rise to and characteristic and the basic grammar structure of programming of VHDL language.
本文介绍了VHDL语言的产生、特点和程序设计的基本语法结构。
A design method by usage of finite state machine and VHDL hardware description language to develop the program is adopted, then it is simulated and downloaded on the EDA software platform.
采用有限状态机设计方法，使用VHDL硬件描述语言编程，并在EDA工具软件平台上进行了仿真和下载。
This paper mainly talks about designing the protocol layer of USB2.0 with the programmable logical device as the carrier through the VHDL language.
本文在此主要通过VHDL语言，利用可编程逻辑器件作为载体来设计usb2.0的协议处理层模块。
I graduated from the core task is to design: FPGA to create a VHDL-based language of the digital voltmeter.
我的毕业设计的核心任务是：采用FPGA来制作一个基于VHDL语言编写的数字电压表。
By using VHDL as design language and according to the principle of VGA, a controller of VGA display system based on FPGA is designed.
依据VGA显示原理，利用VHDL作为设计语言，设计了一种基于现场可编程器件FPGA的VGA多图像控制器，并在硬件平台上实现设计目标。
This paper presents advantage of M-sequences ciphers system by using m sequences as key sequences and proposes the design method of this system based on VHDL language.
文章介绍了用M序列为密钥序列的序列密码系统的优越性，提出了采用VHDL语言来设计这种序列密码系统的新方法。
Then data gained by simulation through the hardware language VHDL were listed out, which proved the validity of the conversion on hardware system.
并列出了一组由VHDL硬件语言模拟得到的转化结果的数据，来证实能在硬件上转化的正确性；
A full-function control system of counting is designed on a PLD device using VHDL language. It can measure and display the length and send out a control signal according to the set value.
利用VHDL语言在PLD器件上设计全功能计数控制装置，使其实现计量、显示长度并根据预置数输出控制信号的功能。
This thesis using FPGA devices and VHDL hardware description language to completed the design and realization of USB equipment controller.
本文主要通过FPGA器件，利用HDL硬件描述语言，初步完成了USB设备控制器的设计和实现。
The VHDL as a standardized hardware description language used to describe the struction of digital systems, behavior, function and interface.
VHDL作为一种标准化的硬件描述语言用于描述数字系统的结构、行为、功能和接口。
VHDL language is the important tool of electronic design, and data object is one of essential language factors.
VHDL语言是现代电子设计的重要工具，数据对象是其中的重要语言要素。
Through a simple and complete and typical 12-band counter VHDL design examples, to make preliminary understanding of VHDL expression and the resulting VHDL language phenomenon and statement rules.
通过一个简单完整而典型的12进制计数器的VHDL设计实例，来使大家初步了解用VHDL表达以及由此而引出的VHDL语言现象和语句规则。
The paper introduce the technique of EDA, on it, logical function has been stigmatized by VHDL language, the design of hardware become more flexible.
本文引入了电子设计自动化(EDA)技术，在EDA平台上使用硬件描述语言(VHDL)完成对硬件功能描述，使硬件设计更加灵活。
As a common kind of language for description of hardware, VHDL was once widely applied in circuit design.
VHDL作为一种通用的硬件描述语言，在电路设计中被广泛使用。
This design makes high use of hardware resource about FPGA, programming with VHDL language, achieving FIR filter with high sampling level based on FPGA.
该设计对FPGA硬件资源的利用高效合理，用VHDL编程，在FPGA中实现了高采样率的F IR滤波器。
Chapter three introduces the VHDL - a sort of-hardware design describe language.
第三章介绍了系统实现的硬件描述语言VHDL。
And combinational logic circuits by using VHDL language and in two ways, comparing the merits of the two implementations and different design processes and ideas.
并且通过应用组合逻辑电路和VHDL语言实现两种方法，对照了两种实现方法的优劣及不同的设计流程和思想。
On the side of software, the design method of control program completed with language VHDL is provided.
软件方面给出了用VHDL语言编写控制程序的设计思路；
This paper researched the work theory and structure of traditional BERT, and used VHDL program language to realize a majority of BERT functions on FPGA.
本设计研究了传统误码仪的工作原理与结构，并利用VHDL语言在FPGA芯片上模拟实现了绝大部分的传统误码仪的功能。
This paper researched the work theory and structure of traditional BERT, and used VHDL program language to realize a majority of BERT functions on FPGA.
本设计研究了传统误码仪的工作原理与结构，并利用VHDL语言在FPGA芯片上模拟实现了绝大部分的传统误码仪的功能。
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