For isolated LDMOS devices, the resistance between the lateral isolation wall (32) (tied to the source) and the buried layer (24) is reduced, thereby reducing substrate injection current.
对于隔离的LDMOS器件，横向隔离壁(32)(结合至源极)与埋层(24)之间的电阻减少，从而减少了衬底注入电流。
For isolated LDMOS devices, the resistance between the lateral isolation wall (32) (tied to the source) and the buried layer (24) is reduced, thereby reducing substrate injection current.
对于隔离的LDMOS器件，横向隔离壁(32)(结合至源极)与埋层(24)之间的电阻减少，从而减少了衬底注入电流。
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