An efficient SOC design lies on reusable IP cores.
有效的片上系统设计依赖于可复用的IP核。
After testing, the IP cores can complete the communication with the IC card.
经过测试，本文设计的IP核能够完成与IC卡的通讯功能。
The first problem of test reuse is the design of test architecture of reusable IP cores.
测试复用的第一个问题就是可复用IP核测试结构设计问题。
Experiments show that this testing frame can make an effective test on IP cores and take SOC environment of IP core into account while keeping high code coverage.
通过实验验证，该测试方法能够在保证一定代码覆盖率的前提下，对IP核进行有效的测试，并提高了测试后IP核的可移植性。
Via the acquisition Aeroflex gains ownership of Gaisler's IP cores and development tools for commercial and aerospace embedded processors based on the SPARC architecture.
通过这次并购，Aeroflex公司获得了Gaisler公司的IP核心和开发工具，可以用于商用和宇宙空间的基于SPARC体系结构的嵌入式处理器。
In the process of system developing, the engineer should first solve the problem of DFT, especially when lots of digital circuits or IP cores are used in system On Chip.
在系统级开发的过程中需要优先解决可测性问题，特别是设计系统级芯片会用到很多数字线路和IP内核。
This paper presents a hardware design scheme of torque control for the large inertia retroaction flywheel based on a fully digitized system level integration of IP cores.
针对大惯量反作用飞轮系统中的关键技术进行了研究，提出了一套基于数字IP内核集成的硬件实现方案，可以解决飞轮控制中普遍存在的一些问题。
IP core web management system can organize and manage the data of IP cores effectively, and provide a convenient platform for users to search and choose the right IP cores.
IP核网络管理系统可以有效的组织和管理IP核数据，并且为用户查找、选择合适的IP核提供一个便利的公共平台。
With the desired result, template IP files are modified to add the control module into. After altering communication part of IP cores, the IP cores with corresponding function are packaged.
在得到预期的仿真结果后，对IP核模板文件进行改写将控制模块加入其中，并完成IP核通讯部分的改动，得到具有相应控制功能的IP核。
Based on a thorough study of Soft-IP design methodologies, two sort of widely-used Manchester encoder and decoder Soft-IP cores have been designed, in need of developing subsequence instruments.
在深入研究可复用IP软核设计方法的基础上，结合开发团队实际需要，设计了常用的两款曼彻斯特编译码器IP软核。
Gaisler's flagship product is the LEON synthesizable processor which includes a full development environment and a library of IP support cores (GRLIB).
Gaisler公司的旗舰产品是LEON synthesizable处理器，其中包括了一个完整的开发环境和一个IP支持核心库(GRLIB)。
You could also explore free third-party cores from sources such as opencores (see Resources), but some adaptation will definitely be necessary to connect these cores to Xilinx bus IP.
还可以从opencores这类来源寻求免费的第三方核心(请参阅参考资料)，但要把这些核心连接到Xilinx总线IP，肯定需要做些适配工作。
You could also explore free third-party cores from sources such as opencores (see Resources), but some adaptation will definitely be necessary to connect these cores to Xilinx bus IP.
还可以从opencores这类来源寻求免费的第三方核心(请参阅参考资料)，但要把这些核心连接到Xilinx总线IP，肯定需要做些适配工作。
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