STD bus is an industrial Computer control parallel internal bus. It is widely used in the field of real-time control.
STD总线是面向工业控制的计算机内总线系线，在计算机实时控制领域得到广泛应用。
The invention relates to a plasma display with an internal bus structure and the shape of the bus electrode can be changed.
本发明涉及具有内部总线结构的等离子显示器，总线电极的形状可变。
The procedures of iterative equivalent and internal bus modification are followed to gain the convergence of distributed reactive optimization.
如此交替等值和内点法修正，直到分布式无功优化计算收敛。
Design of synchronous cycle trig based on internal bus, consensus definition of sensor sampling and actuator timing and precise data transmission model ensured the synchronization performance.
设计了基于内部总线的同步周期触发，定义了一致的传感器、执行器单元执行时序，以及精确光纤链路数据传输模型，确保测控的高同步性。
You can use one for requests coming from external clients into the bus, and the second one for requests coming from internal clients.
您可以将一个用于将来自外部客户端的请求纳入总线，并且将第二个用于来自内部客户端的请求。
For example, we wouldn't want ordinary user-level code to gain access to the system bus and directly read internal communication.
例如，我们不希望普通用户级别的代码能够访问系统总线以及直接读取内部通信。
For example, you wouldn't want ordinary user-level code to be able to gain access to the system bus and directly read internal communication.
例如，不希望普通用户级代码能够访问系统总线以及直接读取内部通信。
It also USES messaging on the service integration bus for its internal processing.
它还在服务集成总线上使用消息传递进行内部处理。
Furthermore, the message bus can take advantage of the underlying runtime for some of its internal components.
此外，消息总线能够利用它的内部组件的基础运行时间。
The internal processor bus described in Sec. XX is connected to the external processor bus by a set of bus buffers located on the microprocessor integrated circuit.
XX节所描述的内部总线通过一组位于微处理器集成电路内的总线缓冲器与外部总线连接。
A bus provides a common interconnected system composed of a group of wires or circuitry that coordinates and moves information between the internal parts of a computer.
总线提供了一种常见的互连系统，它由一组导线或电路组成，在计算机的内部组成部分之间协调和移动信息。
This paper also analyzes the internal structure of the interface, and gives the design of PCI bus configuration and the realization of target state machine in the interface of PCI.
本文还分析了接口内部实现结构，给出了PCI总线配置空间的设计以及目标状态机的实现。
Trigger sources include manual (front panel button), IEEE-488 bus, trigger Link, internal timer, and external trigger.
触发源包括手动(从面板按钮)、IEEE- 488总线、TriggerLink接口、内部时钟和外部触发。
The 1553B bus technology is widely used in campaign systems of internal naval ships.
国内舰艇作战系统广泛使用了1553B总线技术。
Therefore, this paper presents an FPGA-based implementation scheme of CAN bus controller, gives the structure diagram, and detailedly describes the internal modules.
因此本文提出一种基于FPGA的CAN总线控制器的实现方案，给出其结构框图，并对内部各模块进行较为详细的介绍。
Logic for interface to the back-side bus for accesses to the internal unified level two processor cache.
访问内部统一二级处理器缓存的后端总线接口逻辑。
The transient stability problem is studied for a single machine-infinite bus system with internal parameter uncertainties and external disturbances.
研究了具有内部参数不确定及外部扰动的单机无穷大电力系统的暂态稳定性问题。
The transient stability problem is studied for a single machine-infinite bus system with internal parameter uncertainties and external disturbances.
研究了具有内部参数不确定及外部扰动的单机无穷大电力系统的暂态稳定性问题。
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