The gathering and controlling of high speed data of audio frequency by CPLD and the logic design of interface are introduced for underground water leakage detecting instrument.
介绍了在地下漏水探测仪中用CPLD实现高速音频数据采集控制及与单片机的接口逻辑设计。
Requirements for high speed network adapter in cluster were analyzed in this thesis. The function logic of the network adapter and PCI interface could be implemented in a single FPGA chip.
文中分析了机群系统中高速通信网卡对PCI接口的要求，采用紧凑设计思想，将网卡的功能逻辑与PCI接口实现在一个FPGA芯片中。
Requirements for high speed network adapter in cluster were analyzed in this thesis. The function logic of the network adapter and PCI interface could be implemented in a single FPGA chip.
文中分析了机群系统中高速通信网卡对PCI接口的要求，采用紧凑设计思想，将网卡的功能逻辑与PCI接口实现在一个FPGA芯片中。
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