The verification automaton and the algorithm for abstracting critical path are proposed to verify high level synthesis process automatically.

为了便于自动验证高层综合过程，给出了验证自动机模型。

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Research on the Algorithm and Methodology of Integrating High Level Synthesis and Floorplan;

介绍了高层次综合与布图规划相结合的基本方法与技术及其研究进展。

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Research on the Algorithm and Methodology of Integrating High Level Synthesis and Floorplan;

介绍了高层次综合与布图规划相结合的基本方法与技术及其研究进展。

youdao