This paper introduces a design of Direct Digital Frequency Synthesis(DDFS) based on CPLD, and describes clearly the design method of a multi-function waveform generator using DDFS.
本文介绍了一种基于CPLD的直接数字频率合成（DDFS）的实现方法，详细阐述了采用此技术设计多功能信号发生器的方法。
A multi-speed jittered signal generator (216,400) that generates a full-speed jittered signal (404) by scaling a low-speed jittered signal (420) using a frequency scaler (428).
通过使用频率缩放器（428）缩放低速抖动信号（420）产生全速抖动 信号（404）的多速抖动信号发生器（216，400）。
A multi-speed jittered signal generator (216,400) that generates a full-speed jittered signal (404) by scaling a low-speed jittered signal (420) using a frequency scaler (428).
通过使用频率缩放器（428）缩放低速抖动信号（420）产生全速抖动 信号（404）的多速抖动信号发生器（216，400）。
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