The design describes the structure of compound die stamping flip-chip design and working process.
本次设计阐述了冲压倒装复合模的结构设计以及工作过程。
Chip scale package (CSP) for flip-chip on hard substrates and wafer re-distribution is studied, and its process flow is described.
对刚性基板倒装式和晶圆再分布式两种结构的芯片级封装（CSP）进行了研究，描述了CSP的工艺流程；
Underfill technology effectively enhances the flip-chip cycle fatigue life and reliability of packaging process.
基 板上的倒装芯片一般采用底部填充技术以提高其封装的可靠性。
The system can process wafers up to 200mm in diameter and includes die inversion for flip chip applications.
该系统可以处理直径多达200毫米的晶片，包括模具的倒装。
The system can process wafers up to 200mm in diameter and includes die inversion for flip chip applications.
该系统可以处理直径多达200毫米的晶片，包括模具的倒装。
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