FIR filter is widely used in the digital signal processing field.
数字FIR滤波器广泛地应用于数字信号处理领域。
Using assembly language can be prepared by the procedure FIR filter function.
用汇编语言编写的可实现fir滤波器功能的程序。
The implementation procedure and result for the FIR filter algorithm are illustrated.
对FIR滤波器的并行算法进行了具体的设计和实现。
According to digital FIR filtering theory, analyze and compare the methods of designing FIR filter.
根据FIR数字滤波器理论，分析比较实现fir滤波器的方法。
At first, a parallel structure of the fir filter is presented based on polynomial decomposition method.
本文首先从多项式分解角度给出一种FIR滤波器的并行结构。
The design method for FIR filter and the performing method with DSP devices are discussed in the paper.
文中讨论了FIR滤波器的设计方法，以及用d SP器件的实现方法。
This paper presents a new high speed FIR Filter structure which includes a unique multiplier adder unit.
本文提出了一种新型的高速滤波器结构，此结构的核心是一种独特的乘加单元。
After developing Lagrange multiplier algorithm, we provide steps to obtain the optimal desampling FIR filter.
在对拉格朗日乘子法做了详细的推导后给出了FIR滤波器求解的步骤。
In this paper, a novel design method of a passband edge frequency continuous adjustable FIR filter is presented.
提出了一种通带截止频率连续可调的低通滤波器的新的设计方法。
Moreover, the detailed design process of two-channel FIR filter Banks is presented by using the modulated method.
最后给出了用此方法设计两通道线性相位完全重构有限脉冲响应滤波器组的详细过程。
This paper designs a digital FIR filter architecture, which can be used to filter high-speed differential signals.
设计了一种对高速差分信号进行FIR滤波的滤波器结构。
The narrow band FIR filter based on multi-sampling rate of digital signal processing theory is designed and realized on DSP.
基于多抽样率数字信号处理原理，设计窄带FIR滤波器，并在DSP芯片上实现。
This paper proposes a new method for the design of FIR filter by using semi infinite quadratic optimization (SIQO) techniques.
该文基于半无穷维二次优化(SIQO)技术给出一个设计FIR数字滤波器的新方法。
In detail, it specifies the design of FIR filter, computing harmonics theory and the implementation of division and evolution.
着重讲述了FIR滤波器设计、谐波分析以及除法与开方运算的实现。
This implements a tiny benchmark for a FIR filter loop using a C version, and a NEON-optimized one for devices that support it.
它实现了一个使用C版本的FIR（注：有限脉冲响应）滤波器循环，以及针对支持硬件NEON的设备的经过NEON优化的小型性能比较测试。
A novel fast algorithm for FIR filter is presented, the large computational volume of FIR filter with many taps is lowered down.
提出了一种新的FIR滤波器快速算法，显著降低了实时信号处理中的长阶数FIR滤波器的运算量。
Then a linear programming method is proposed to construct the FIR filter correcting the amplitude and phase errors simultaneously.
然后给出了求解逼近给定幅相频率响应的FIR实系数滤波器的线性规划方法；
FIR filter and two-channel filter Banks are widely used and their optimisation design has received substantial attention recently.
FIR滤波器及两通道滤波器组的广泛应用，使其优化设计研究备受关注。
A modified NLMS (MNLMS) algorithm was proposed and applied to drive a FIR filter to approximate both the model and the inverse of plants.
提出一种改进的归一化最小均方(MNLMS)算法，并用该算法驱动FIR滤波器以实现对象模型及其逆的辨识。
The power line channel noise is simulated by MATLAB and the attenuation is simulated through the channel transmission module of FIR filter.
利用MATLAB及用fir滤波器做信道的传输函数模型对信道噪声和复衰减特性分别进行了建模。
The APDFT method is a new scheme for FIR filter design, possessing concurrently the merits of the windowing and the frequency sampling method.
APDFT方法兼有窗函数法和频率采样法的优点，是一种设计FIR滤波器的新方法。
Reviewed the digital filters' structure and design concisely. Discussed and compared three design methods of linear phase FIR filter particularly.
简单回顾了数字滤波器的结构和设计，详细讨论和比较了线性相位FIR滤波器的三种设计方法。
The discrete ZAK transform and Raised cosine FIR filter are used to design time-frequency well-localized pulse shaping filters for OFDM/OQAM systems.
本文提出一种利用ZAK变换及优化的升余弦滚降滤波器设计的OFDM/OQAM系统时频局域优化脉冲成形滤波器。
This design makes high use of hardware resource about FPGA, programming with VHDL language, achieving FIR filter with high sampling level based on FPGA.
该设计对FPGA硬件资源的利用高效合理，用VHDL编程，在FPGA中实现了高采样率的F IR滤波器。
After investigating into the design of classical FIR digital filter, a method of FIR filter design based on proximate best uniform approximation is proposed.
在对经典FIR数字滤波器的设计方法进行研究基础上，提出了一种基于近似最佳一致逼近原理的FIR滤波器设计方法。
The channel shape filter is implemented by a programmable TDD inverse FIR filter, which makes good use of FPGA resource and display the FPGA parallel ability.
设计和实现了多路时分复用转置型FIR滤波器作为信道整形滤波器，充分利用了FPGA的并行处理能力，提高了资源利用率。
The channel shape filter is implemented by a programmable TDD inverse FIR filter, which makes good use of FPGA resource and display the FPGA parallel ability.
设计和实现了多路时分复用转置型FIR滤波器作为信道整形滤波器，充分利用了FPGA的并行处理能力，提高了资源利用率。
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