The new method improves the efficiency of bus and reduces the size of frame buffer in memory and FIFO in DMA channel.
这种结构提高了总线效率，并且减小了内存中解码帧缓冲器和通道中FIFO的面积。
The interface uses a circuit based on dual port FIFO buffer memory to realize data transfer of different I/O velocity between the two computers.
该接口采用双端口FIFO缓冲存储技术，实现两机间不同I／O速度的数据通信。
The interface uses a circuit based on dual port FIFO buffer memory to realize data transfer of different I/O velocity between the two computers.
该接口采用双端口FIFO缓冲存储技术，实现两机间不同I／O速度的数据通信。
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