The invention also provides a realizing method of the device, such that the FIFO control of data cache becomes better and more convenient.
本发明还提供了该装置的实现方法，使得对于数据缓存FIFO的控制更加完善和方便。
The system controls the logic of the data acquisition board by programmable logic device (PLD) with the center of the ARM microcontroller and FIFO memory and provides the simulate waveforms.
系统以ARM微处理器和FIFO存储器为核心，利用可编程逻辑器件实现对整个底层数据采集系统的逻辑控制，并给出了时序控制部分的仿真波形。
The present invention also discloses a device for transmitting a compressed coding result of video, which includes: a buffer unit, a coding unit, a FIFO and a transmission control unit.
本发明还公开了一种传输视频压缩编码结果的装置，包括：缓存单元、编码单元、FIFO和传输控制单元。
The present invention also discloses a device for transmitting a compressed coding result of video, which includes: a buffer unit, a coding unit, a FIFO and a transmission control unit.
本发明还公开了一种传输视频压缩编码结果的装置，包括：缓存单元、编码单元、FIFO和传输控制单元。
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