So, the thesis adopts a type of low loss DSP processor as main controller which composing the control and fault feeder detection system based on DSP in order to deal with the question.
因此论文采用了低功耗的数字信号处理器作为主控芯片，构成一种基于数字信号处理器的控制与选线系统。
The overall hardware design scheme is performed, such as DSP 3. 3V power, voltage and current sampling module, IGBT driving circuit, I/O signal processor, fault detection module and COM circuit etc.
对系统硬件设计的DSP 3．3V电源的获取、电压电流采样模块、IGBT驱动、一般I／O信号的处理、故障监测和串口通信电路进行了研究分析。
The overall hardware design scheme is performed, such as DSP 3. 3V power, voltage and current sampling module, IGBT driving circuit, I/O signal processor, fault detection module and COM circuit etc.
对系统硬件设计的DSP 3．3V电源的获取、电压电流采样模块、IGBT驱动、一般I／O信号的处理、故障监测和串口通信电路进行了研究分析。
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