A full differential dynamic comparator is designed.
设计了一种全差分动态比较器。
The comparator is implemented by the switch and capacitor and dynamic comparator.
比较器的部分是以开关加电容配合动态比较器来实现。
A differential pair dynamic comparator which has no DC power dissipation is used in SUB-ADC.
每级子模块中采用了没有直流功耗的差分对动态比较器，具有更好的综合性能。
The cascode two -stage op -amp and differential dynamic comparator are also used to optimize the speed and power dissipation.
在设计中还采用了共源共栅两级运放和差分动态比较器来优化电路的速度和功耗。
The dynamic comparator is adopted to eliminate the power dissipation, the large offset of the dynamic comparator can be eliminated by digital correction circuit.
设计中采用了动态比较器来降低功耗，其较大的失调误差可以通过数字校正电路进行校正。
The improved dynamic comparator and telescopic OTA were adopted to achieve the design specification, and the main improvements for realizing low power dissipation.
为实现低功耗设计目标，将比较器和OTA作为主要优化对象，采用改进的动态比较结构和套筒式余量放大器（OTA）分别实现上述功能。
The comparator includes a preamplifier, a dynamic latch and a clocked inverter.
该比较器包含一级预放大器、动态锁存器及时钟控制反相器。
The comparator includes a preamplifier, a dynamic latch and a clocked inverter.
该比较器包含一级预放大器、动态锁存器及时钟控制反相器。
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