The site runs on a Lenovo server, dual CPU, 24 GB of memory and 6 hard drives, as the DB server, and another Lenovo server, 1 CPU quad core, 8 GB of memory and dual mirrored HDD, as the web server.
网站的DB服务器采用联想服务器，具体配置为双CPU、24GB内存、6个硬盘驱动器，Web服务器使用另一个联想服务器，具体配置为一个四核CPU、8GB内存、双重镜像硬盘。
Late last month, Samsung provided 1.2-V 2-Gbyte DDR4 unbuffered dual in-line memory modules (UDIMM) to a controller maker for testing.
上个月月底，三星曾将一款1.2V 2GB容量的DDR4unbuffered双列直插内存条样品送给了某家内存控制器厂商进行样品测试。
The survey also found that, on average, each physical machine hosts 15.6 VMs, is dual-socket with quad-core processors, and contains 50gb of memory alongside 2tb of storage.
调查还发现，平均而言，每个物理机主机承载了15.6个虚拟机，配置为双槽四核的处理器，同时配有50gb的内存和2tb的存储。
It can be run on up to two dual-core CPU servers, with up to 4 GB of memory, any storage system setup, and no database size restrictions — or any other types of artificial restrictions.
它可以运行多达两个双核CPU服务器、多达4GB的内存、任何存储系统设置，而且无任何数据库大小限制和其他人为限制。
DB2 Express-C can be run on up to two dual-core CPU servers, with up to 4 GB of memory, any storage system setup and with no restrictions on database size or any other artificial restrictions.
DB 2Express - C可以在至多两个双核CPU服务器上运行，服务器上最大内存为4GB，任何存储系统设置，没有数据库大小或者任何其它人为限制。
The database server available for this study was a Sun X4600 M2 with eight dual-core processors (AMD Opteron 8220) and 256GB main memory.
本研究中使用的数据库服务器是一个Sun X4600M2，具有八个双核处理器 (AMDOpteron 8220)和 256GB主内存。
The chunking strategy has simplification , dual coding and outside memory .
组块的策略有简化策略、双码策略、外存策略。
Motherboard to provide 4 memory slots to support dual - channel 800.
主板提供4条内存插槽，支持双通道800。
Both memory types will be presented in1 and 2 Gb collections for dual-channel regime.
两种记忆类型，将在1日和2绿化珍藏双通道制度。
Modules with microcontrollers in the system process their signals parallelly, and communicate with host processor by dual port memory.
以单片机为核心的各传感器接口模块并行处理各传感器信号，并通过双口存储器与上位处理器通信。
HP USES dual inline memory modules (DIMMs) in industry-standard servers today.
HP今天的业界标准服务器中使用双内联内存模块(Dimm)。
Small memory capacity and short CPU time are repuired by the algorithm for the solution of the economic dispatch every interval with simple form of sparse dual method.
用稀疏对偶单纯形法求解每时段的经济功率分配，所用内存少，计算时间短。
In recent years, several executive functions have been studied, including dual-task coordination, inhibition of prepotent responses, attention switching, and memory updating, etc.
近年来研究较多的执行功能包括：双任务协调、注意转换、抑制优势反应、记忆刷新等。
On the other side of the debate are dual-mechanism approaches which posit that regular verb forms are computed in a rule-processing system while irregular verbs are processed in associative memory.
联结主义认为使用单一机制的神经网络系统足以解释规则和不规则语素变体； 双机制则认为需要规则系统和联想记忆两个不同的机制对此进行解释。
The paper analyses the theory of dual—port memory, introduces its design method. Furthermore, the paper discusses the expansion of DPM. and its application in multiprocessor netwo…
本文分析了双端口存储器的原理，介绍了双端口存储器的设计方法，还讨论了双端口存储器的扩展及其在处理器联网中的应用。
In this system the master-slave parallel structure is composed by DSP and PC. The dual machine high speed communication is implemented by the Shared memory.
该系统采用DSP与PC构成主从式并行结构，共享存储器实现双机高速数据通信。
The interface uses a circuit based on dual port FIFO buffer memory to realize data transfer of different I/O velocity between the two computers.
该接口采用双端口FIFO缓冲存储技术，实现两机间不同I／O速度的数据通信。
The dual-ported RAM is a kind of special memory, and the bus data share between double high-speed microprocessors is carried out by using it.
双端口ram是一种特殊的数据存储芯片，利用双端口ram可以实现双高速单片机总线方式的数据共享。
With a Dual bike Memory, it is possible to record and store information for more than one bike or rider.
随着双自行车内存，可以记录和保存超过一个骑自行车或骑手的信息。
The memory system of dual channel A/D automatic acquisition is studied in this paper. Using transceivers and gating controllers, the data bus and address bus of RAM are respectively controlled.
本文研究了双通道A/D自动采集存储系统，利用数据收发器及数据选通控制器分别控制RAM的数据线及地址控制线。
This system USES Dual Port Random Access Memory (DPRAM) to realize the communication between two processors and chooses the recursive least error squares (RLES) algorithm.
该系统利用双端口ram (DPRAM)实现两处理器的通信，运用递推最小二乘法实现保护算法。
The results implied that we can combine the feature-configuration and dual-processes theory to explain the memory conjunction errors effect.
实验结果说明，我们可以将特征-构造理论和双加工理论结合起来对记忆的联合错误效应进行解释。
The influence of central executive of working memory on arithmetic cognitive strategies of 113 children in primary 2 by using dual-task paradigm was explored.
运用“双重任务”范式，以113名小学二年级儿童为被试，考察了儿童工作记忆的中央执行对算术认知策略表现的影响。
According to the embodiment of the invention, single point failure is prevented in a dual-control or multi-control memory system, thereby improving reliability of the whole memory system.
根据本发明实施例，避免了在双控或者多控存储系统中出现单点故障，从而提高了整个存储系统的可靠性。
The AD5172/ AD5173 are dual-channel, 256-position, one-time programmable (OTP) digital potentiometers1 that employ fuse link technology to achieve memory retention of resistance settings.
AD5172和AD5173是一款双通道、256抽头、一次性可编程（OTP）数字电位器，它采用熔丝链技术实现永久性程序设置。
The AD5172/ AD5173 are dual-channel, 256-position, one-time programmable (OTP) digital potentiometers1 that employ fuse link technology to achieve memory retention of resistance settings.
AD5172和AD5173是一款双通道、256抽头、一次性可编程（OTP）数字电位器，它采用熔丝链技术实现永久性程序设置。
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