Renaming for CNF formulas may help to improve DPLL algorithm.
研究CNF公式的改名有助于改进DPLL算法。
The Digital Phase Lock Loop(DPLL)is the core of the coherent demodulation.
数字锁相环路（DPLL）是数字相干解调技术的核心。
The experimental results indicate the circuit is credible and the program runs well. The DPLL based on DSP is competent for ultra-audio frequency-tracking.
实验结果证明基于DSP的DPLL完全可以胜任超音频的频率跟踪，系统硬件电路可靠，程序运行良好。
Additionally, a hardware DPLL is constructed and tested to provide a comparison to the results obtained from the Markov chain model. It is found that the theoretical predictions are in...
另外，针对一个硬件DPLL进行了测试，与马尔可夫链模型获得的结果进行比较，发现理论预测与实验能很好地吻合。
Based on nonlinear loop models, quantitative analysis on noise performance and capture procedure of the DPLL is performed. The simulation results are in good accordance with the experimental data.
利用非线性环路模型对环路的噪声性能和捕捉过程进行了定量分析，仿真结果与实测数据吻合得较好。
Based on nonlinear loop models, quantitative analysis on noise performance and capture procedure of the DPLL is performed. The simulation results are in good accordance with the experimental data.
利用非线性环路模型对环路的噪声性能和捕捉过程进行了定量分析，仿真结果与实测数据吻合得较好。
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