Frequency controlled data (m) plus an accumulative phase data output by a phase register in an N-bit adder when a clock pulse comes, the result is sent to the input port of the phase register.
每来一个时钟脉冲，N位加法器将频率控制数据m与相位寄存器输出的累加相位数据相加，并将结果送相位寄存器输入端。
The clock and calendar data are also given in series code format as well as the normal output of hour, minute and second time marks.
时标输出除有常规的时、分和秒号外，还将日历和时钟数据以串行编码方式输出。
A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided.
它提供一个数据时钟输出(DCO)用于在输出端捕获数据，以及一个帧时钟输出(FCO)用于发送新输出字节信号。
A data clock output (DCO) for capturing data on the output and a frame clock output (FCO) for signaling a new output byte are provided.
它提供一个数据时钟输出(DCO)用于在输出端捕获数据，以及一个帧时钟输出(FCO)用于发送新输出字节信号。
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