This dissertation focuses on the analysis, design and implementation of data-parallel memory system for Tiled Stream Processor.
论文的研究工作着眼于分片式流处理器的数据并行存储系统的分析、设计和实现。
The system adopted AT89S51 CPU, which can finish controlling, computing, storing and communication functions through extending program memory, data memory, serial port and parallel port.
本系统CPU采用AT 89s51，通过程序存贮器、数据存贮器、串口和并口的扩展，可以完成控制、计算、存贮和通讯等功能。
The system adopted AT89S51 CPU, which can finish controlling, computing, storing and communication functions through extending program memory, data memory, serial port and parallel port.
本系统CPU采用AT 89s51，通过程序存贮器、数据存贮器、串口和并口的扩展，可以完成控制、计算、存贮和通讯等功能。
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