The dissertation designs a 12-bit "4-4-4" segmented current steering DAC.
本文设计的数模转换器是一个“4-4-4”分段的12位电流舵型DAC。
The dissertation introduces the design of a 12-bit segmented current steering DAC based on data weighed average algorithm (DWA).
本论文着重阐述一种基于数据权重平均算法（DWA）的12位分段式电流舵型数模转换器的设计。
A low power design in system level using current steering architecture, which can be applied to the system of CMOS mixed signal circuit widely, is presented.
提出了一种系统级电流使能控制结构，可广泛地应用在CMOS数模混合电路中，用于实现系统级的低功耗设计。
The influence of current switches on output glitch of high-speed current-steering CMOS D/A converter is thoroughly analyzed.
系统分析了高速电流型CMOS数模转换器中电流开关对输出毛刺的影响 ，给出了减小输出毛刺的方法 。
The analysis of the structure of adding current-steering to extend DAC-bits is presented, of which the main shortcoming is the decline of the static parameters.
分析了电流舵型数模转换器（DAC）通过增加一路电流以扩展位结构，其最大弊端是降低了原DAC的静态误差参数。
After compared some structures of DAC, the segmented architecture of current-steering DAC is adopted. The 5 MSBS are thermometer code weighed and the 3 LSBS are binary-weighted.
通过对DAC结构的比较，决定采用分段式电流舵结构，其中高5位采用温度计码，低3位采用二进制译码。
It consists of a variable-gain cell based on a current-steering structure, a novel wide-range exponential voltage generator, and a stage of a fixed-gain amplifier.
该放大器由电流调节型可变增益单元、宽范围指数电压转换电路及固定增益放大器构成。
It consists of a variable-gain cell based on a current-steering structure, a novel wide-range exponential voltage generator, and a stage of a fixed-gain amplifier.
该放大器由电流调节型可变增益单元、宽范围指数电压转换电路及固定增益放大器构成。
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