They describe the design and implementation scheme of an arbiter for configuring crossbar in input-queued switches that supporting multiple priorities.
然后给出了在高速输入队列交换机中实现多优先级调度算法的调度器设计与实现方案。
We complete the design of crossbar switch with 6 ports and 32 bits data bus on one chip of FPGA.
我们在单片FPGA中完成了6个端口、32位数据总线宽度交叉开关的设计。
We complete the design of crossbar switch with 6 ports and 32 bits data bus on one chip of FPGA.
我们在单片FPGA中完成了6个端口、32位数据总线宽度交叉开关的设计。
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