For the sake of simplicity, we call them logical CPU 0 and logical CPU 1.
为了简单，我们把它们称为逻辑CPU 0和逻辑CPU1。
The workload in logical CPU 0 accounts for only 5% of physical CPU, while logical CPU 1 accounts for the rest.
逻辑CPU 0中的工作负载只占用物理 CPU的 5%，而逻辑 CPU1 占用其余部分。
CPU 0 was intentionally left free of networking interrupts since it is typically heavily used in many workloads.
有意地不让CPU 0 处理网络中断，因为这个 CPU通常用来处理许多工作负载。
The stack trace shown above describes that the problem appears to have happened when a thread running on CPU 0 ran the function __memmove.
上图显示的栈跟踪描述了当CPU 0上的某个线程运行function __memmove时出现的问题。
Mpstat now reports (below) that logical CPU 0 is back to an idle state, while CPU 1 takes over the workload from CPU 0 for WPAR "def" 's processes.
如下所示，mpstat现在报告逻辑CPU 0恢复到空闲状态，而逻辑CPU1从逻辑CPU 0接管WPAR“def”的进程的工作负载。
The first line of output in this section lists the CPU that detected the problem that caused the dump routine to be invoked (CPU 0 in the previous example).
该部分中，输出的第一行列出了检测到问题的CPU，这些问题造成转储例程被调用（在前面的示例中 CPU为 0）。
For the taskset-chrt measurement set added in Figure 2, all of the threads of each process are set to CPU 0 and 2 (taskset) only, with SCHED_RR and a priority of 99 (CHRT).
对于在图2中添加的taskset -chrt测量集合，每个进程的所有线程都仅设置为cpu 0和2 (taskset)，并具有SCHED _ RR和优先级99 (chrt)。
Though very basic and out of context, the data in this example shows that the calc process used between 0 and 6.7% of the machine's CPU.
这个示例中的数据展示了机器CPU的0和6.7%之间所用的计算进程，不过非常基本并且脱离了上下文。
If we can measure the power at 0-percent CPU (or as close as possible) and at 100 percent, we can assume a linear interpolation between the two.
如果我们可以测量出CPU在0使用率时(或尽可能接近0)与在100%使用率时的电量，我们就可以假设二者之间是线性关系。
Run the setpb program with the argument below, so it tries to bind to CPU number 0.
使用下面的参数运行setpb程序，尝试将其绑定到CPU 0。
Database workload: 0 to 10 percent less CPU.
数据库工作负载：CPU减少0%到10%。
The floating-point unit integrated into the CPU chip has signaled an error condition, such as numeric overflow or division by 0.
集成到CPU芯片的浮点数单元产生一个错误条件，比如数字溢出或者除0。
DMA can run constantly or can be triggered by exterior interruption (INT3-0), interior interruption (timer and serial port), at the end of transfers, send interruption signal to CPU.
DMA可以被外部(INT3 - 0)、内部的(片内定时器和串口)中断触发运行，传输完成后可以向CPU发出中断请求。
DMA can run constantly or can be triggered by exterior interruption (INT3-0), interior interruption (timer and serial port), at the end of transfers, send interruption signal to CPU.
DMA可以被外部(INT3 - 0)、内部的(片内定时器和串口)中断触发运行，传输完成后可以向CPU发出中断请求。
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