This paper presents two CMOS practical circuits for the optimal Universal-Logic-Gate (ULG. 2).
本文提出了最佳通用逻辑门ulg。2的两种CMOS实用电路。
In this paper, a 10k-gate radiation tolerant CMOS gate array has been developed to assess the intrinsic radiation hardness of circuits built at standard commercial CMOS foundries.
本文利用标准的商业CMOS工艺，设计了一个1万门的抗辐射加固的CMOS门阵列，用以评估商业工艺线制造的电路的抗辐射水平。
In this paper, a 10k-gate radiation tolerant CMOS gate array has been developed to assess the intrinsic radiation hardness of circuits built at standard commercial CMOS foundries.
本文利用标准的商业CMOS工艺，设计了一个1万门的抗辐射加固的CMOS门阵列，用以评估商业工艺线制造的电路的抗辐射水平。
应用推荐