The bus and the processor core often run in different clock frequencies, so their interface signals belong to different clock domains.
总线时钟与处理器内核时钟频率不同，因此总线部件与处理器内核间的接口信号需要进行时钟域转换。
This involves taking two measurements from different parts of a very broad comb and comparing the results to precisely known frequencies of an atomic clock.
这是通过，用一个非常宽的频率梳的两个部分测量一个已知的精确的原子钟频率，然后比较两者测量的结果来实现的。
A cesium clock operates by exposing cesium atoms to microwaves until they vibrate at one of their resonant frequencies and then counting the corresponding cycles as a measure of time.
一个铯钟的工作原理是：将铯原子暴露于微波中，直到它们以一个频率共振，然后以一个相应的周期作为时间度量。
Different components in a digital system often need different working frequencies, the way we often used is clock division from the system clock.
在数字系统中各个模块所需的时钟频率往往不相同，通常采用分频的方法由系统时钟得到所需频率。
But it's also possible that the mission clock or communications equipment may have degraded, meaning that it's trying to communicate on the wrong frequencies.
但是也有可能是任务时钟或通讯设备退化，这意味着它试图按错误的频率通信。
The external clock frequency applied to the AD7764 determines the sample rate, filter corner frequencies, and output word rate.
AD7764的采样速率、滤波器转折频率和输出字速率由外部时钟频率决定。
The sample rate, filter corner frequencies and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7763.
采样速率、滤波器转折频率和输出字速率由AD7763的外部时钟频率与配置寄存器共同设置。
The sample rate, filter corner frequencies, and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7760.
采样速率、滤波器转折频率和输出字速率由ad7760的外部时钟频率与配置寄存器共同设置。
The sample rate, filter corner frequencies and output word rate are set by a combination of the external clock frequency and the configuration registers of the AD7762.
采样速率、滤波器转折频率和输出字速率由ad7762的外部时钟频率与配置寄存器共同设置。
An improving measurement with the principle of the vernier caliper is presented, which USES the clock-signals with two different frequencies, and the precision is improved much.
在时域测量中，巧妙的借用“游标卡尺”原理，利用两种不同频率的时钟信号同时对信号时差进行精确测量，其测量精度较之传统的方法有很大的提高。
Pixel clock output frequencies range from 10mhz to 140mhz with sampling clock jitter of 250ps peak to peak.
像素时钟输出频率范围从10mhz到140mhz的采样250ps的峰峰值抖动。
Pixel clock output frequencies range from 10mhz to 140mhz with sampling clock jitter of 250ps peak to peak.
像素时钟输出频率范围从10mhz到140mhz的采样250ps的峰峰值抖动。
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