Tessera still owns patents for chip packaging that enable electronics miniaturization.
Tessera还拥有实现电子设备小型化的芯片封装专利。
Mask line Machining made of non-woven using high-quality, single and multi-chip packaging, and customers can request for sterilization.
面膜系采用优质无纺布加工制成，有单片和多片包装，并可按客户要求作灭菌处理。
Failure analysis is conducted for the single chip packaging process of an advanced high-range MEMS accelerometer with double cantilever beams.
对一种先进的双悬臂梁高量程MEMS加速度计的单芯片封装工艺进行了失效机理分析。
Multi-chip packaging ( MCP ) technologies and their basi status, state-of-art of applications for mobile phone memory are reviewed in this paper.
文章评述多芯片封装技术及目前的基本情况，这一技术在手机存储器的应用现状等。
The utility model discloses a multi-chip packaging structure comprising at least a loader, at least a packaging module, an insulation layer and a pattern metal layer.
本实用新型公开一种多芯片封装结构，至少包括一承载器、至少一封装模块、一绝缘层及一图案化金属层。
Moreover, some major processes package of MEMS, including wafer-level packaging, single-chip packaging, multi-chip packaging and stacked 3d packaging, etc were discussed.
阐述了MEMS的主要封装工艺和技术，包括圆片级封装、单芯片封装、多芯片组件和3d堆叠式封装等。
The pattern metal layer is arranged on the insulation layer and filled into the diversion holes, thereby being an inner linking layer of the multi-chip packaging structure of the utility model.
图案化金属层位于绝缘层上并填入于导通孔中，以作为本实用新型多芯片封装结构的内连线层。
Instead, extra oomph has been added in recent years by packaging multiple processing engines, or "cores", inside a single chip.
与之相反的是，近年来出现的通过将多个处理引擎或者“核”封装在一个芯片上的现象，又展现了另一种魅力。
With the increase of chip integration level and packaging density, the heat density generated in computer keeps increasing exponentially in recent years.
随着芯片集成度及整机安装紧凑性的提高，计算机发热密度近年来一直呈指数级增长。
High density packaging can he achieved by using leadless ceramic chip carriers (LCCCs).
使用无引线陶瓷芯片载体(LCCC)可以达到高密度封装。
Parts for Lexmark T650 toner cartridges including toner, chip, OPC wiper blade, ship protector, packaging materials.
适用于利盟t650再生硒鼓的零件包括：碳粉、芯片、感光鼓、清洁刮刀、运输保护、包装材料。
Studied a constant tension control system controlled by a single-chip processor in order to deal with the unsteadiness, which occurs in the supplying process of packaging machine cylinder material.
针对包装机卷筒材料供送过程存在的张力控制不稳定的问题，研究设计一种单片机控制的恒张力控制系统。
Quad Flat No-lead(QFN)package of microwave chip is a relatively new packaging. It offers a small size and especially fits for high density printed circuit assembly.
QFN封装的微波芯片采用一种较新的封装形式，这种封装体积很小，特别适合高密度印刷电路板组装。
This paper put forward the PIC single chip technology and cryptography theory which were applied in anti-forgery packaging.
文中提出将PIC单片机技术和密码学原理应用到防伪包装领域；
Flip Chip on Board (FCOB) has been used widely as a microelectronics packaging structural form.
板上倒装芯片(FCOB)作为一种微电子封装结构形式得到了广泛的应用。
In 3d-mcm (multi chip module) packaging designs, heat dissipation is one of the key issues that must be solved.
在3d -MCM(多芯片组件)封装设计中，大功率和高热流密度导致系统的散热成为关键技术之一。
TDA1170N is a single chip vertical scanning IC with 12 pins and square shaped plastic packaging.
TDA1170N是一种单片式电视场偏转集成电路，有12个引脚，呈方形直插塑封。
Low Temperature Co-fired Ceramics (LTCC) is an excellent packaging technique for achieving highly reliable and miniature microwave multi-chip modules (MMCM).
低温共烧陶瓷(LTCC)是实现小型化、高可靠微波多芯片组件(MMCM)一种理想的组装技术。
A new planar parallel positioning mechanism is presented, which can be used as the high-speed and high-precision table in the chip-packaging application.
面向芯片封装领域对高速高精度平台的需求，提出一种新型平面并联定位机构。
As compared with traditional packaging method, the coating method with phosphors away from the LED chip can improve the luminous efficiency by more than 5%.
与传统封装方法相比，采用荧光粉远离芯片的封装方法可使发光效率提高5%左右。
To investigate the sensor packaging effect, the finite element method is adopted for analyzing the distribution of residual stress in the multi-sensor chip with FR4 substrates.
针对集成传感器芯片封装粘贴过程中的残余应力影响器件性能的问题，使用有限元方法对环氧粘胶粘贴集成传感器芯片产生的封装残余应力进行了分析。
Underfill technology effectively enhances the flip-chip cycle fatigue life and reliability of packaging process.
基 板上的倒装芯片一般采用底部填充技术以提高其封装的可靠性。
Underfill technology effectively enhances the flip-chip cycle fatigue life and reliability of packaging process.
基 板上的倒装芯片一般采用底部填充技术以提高其封装的可靠性。
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